prev_cmp_dds.map.qmsg

DDs直接数字频率合成器的源代码

{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|bypassff:sign_ff\[0\] lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|bypassff:sign_ff\[0\]\", which is child of megafunction instantiation \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 256 12 0 } } { "lpm_add_pharse.vhd" "" { Text "E:/yezi/design/dds/lpm_add_pharse.vhd" 75 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Instantiated megafunction \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_direction ADD " "Info: Parameter \"lpm_direction\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ONE_INPUT_IS_CONSTANT=NO,CIN_USED=NO " "Info: Parameter \"lpm_hint\" = \"ONE_INPUT_IS_CONSTANT=NO,CIN_USED=NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_pipeline 1 " "Info: Parameter \"lpm_pipeline\" = \"1\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type LPM_ADD_SUB " "Info: Parameter \"lpm_type\" = \"LPM_ADD_SUB\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_width 32 " "Info: Parameter \"lpm_width\" = \"32\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "lpm_add_pharse.vhd" "" { Text "E:/yezi/design/dds/lpm_add_pharse.vhd" 75 0 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus72/quartus/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus72/quartus/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/altshift.tdf" 30 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs\"" {  } { { "lpm_add_sub.tdf" "result_ext_latency_ffs" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:result_ext_latency_ffs\", which is child of megafunction instantiation \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 286 2 0 } } { "lpm_add_pharse.vhd" "" { Text "E:/yezi/design/dds/lpm_add_pharse.vhd" 75 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Instantiated megafunction \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_direction ADD " "Info: Parameter \"lpm_direction\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ONE_INPUT_IS_CONSTANT=NO,CIN_USED=NO " "Info: Parameter \"lpm_hint\" = \"ONE_INPUT_IS_CONSTANT=NO,CIN_USED=NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_pipeline 1 " "Info: Parameter \"lpm_pipeline\" = \"1\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type LPM_ADD_SUB " "Info: Parameter \"lpm_type\" = \"LPM_ADD_SUB\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_width 32 " "Info: Parameter \"lpm_width\" = \"32\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "lpm_add_pharse.vhd" "" { Text "E:/yezi/design/dds/lpm_add_pharse.vhd" 75 0 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs\"" {  } { { "lpm_add_sub.tdf" "carry_ext_latency_ffs" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\|altshift:carry_ext_latency_ffs\", which is child of megafunction instantiation \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 288 2 0 } } { "lpm_add_pharse.vhd" "" { Text "E:/yezi/design/dds/lpm_add_pharse.vhd" 75 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Instantiated megafunction \"lpm_add_pharse:inst1\|lpm_add_sub:lpm_add_sub_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_direction ADD " "Info: Parameter \"lpm_direction\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ONE_INPUT_IS_CONSTANT=NO,CIN_USED=NO " "Info: Parameter \"lpm_hint\" = \"ONE_INPUT_IS_CONSTANT=NO,CIN_USED=NO\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_pipeline 1 " "Info: Parameter \"lpm_pipeline\" = \"1\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type LPM_ADD_SUB " "Info: Parameter \"lpm_type\" = \"LPM_ADD_SUB\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_width 32 " "Info: Parameter \"lpm_width\" = \"32\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "lpm_add_pharse.vhd" "" { Text "E:/yezi/design/dds/lpm_add_pharse.vhd" 75 0 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "DPLL.vhd 2 1 " "Warning: Using design file DPLL.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 dpll-SYN " "Info: Found design unit 1: dpll-SYN" {  } { { "DPLL.vhd" "" { Text "E:/yezi/design/dds/DPLL.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 DPLL " "Info: Found entity 1: DPLL" {  } { { "DPLL.vhd" "" { Text "E:/yezi/design/dds/DPLL.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DPLL DPLL:inst4 " "Info: Elaborating entity \"DPLL\" for hierarchy \"DPLL:inst4\"" {  } { { "dds.bdf" "inst4" { Schematic "E:/yezi/design/dds/dds.bdf" { { 448 32 288 608 "inst4" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus72/quartus/libraries/megafunctions/altpll.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus72/quartus/libraries/megafunctions/altpll.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altpll " "Info: Found entity 1: altpll" {  } { { "altpll.tdf" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/altpll.tdf" 481 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll DPLL:inst4\|altpll:altpll_component " "Info: Elaborating entity \"altpll\" for hierarchy \"DPLL:inst4\|altpll:altpll_component\"" {  } { { "DPLL.vhd" "altpll_component" { Text "E:/yezi/design/dds/DPLL.vhd" 92 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "DPLL:inst4\|altpll:altpll_component " "Info: Elaborated megafunction instantiation \"DPLL:inst4\|altpll:altpll_component\"" {  } { { "DPLL.vhd" "" { Text "E:/yezi/design/dds/DPLL.vhd" 92 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_constant0.vhd 4 2 " "Warning: Using design file lpm_constant0.vhd, which is not specified as a design file for the current project, but contains definitions for 4 design units and 2 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lpm_constant0_lpm_constant_ama-RTL " "Info: Found design unit 1: lpm_constant0_lpm_constant_ama-RTL" {  } { { "lpm_constant0.vhd" "" { Text "E:/yezi/design/dds/lpm_constant0.vhd" 50 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 lpm_constant0-RTL " "Info: Found design unit 2: lpm_constant0-RTL" {  } { { "lpm_constant0.vhd" "" { Text "E:/yezi/design/dds/lpm_constant0.vhd" 105 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 lpm_constant0_lpm_constant_ama " "Info: Found entity 1: lpm_constant0_lpm_constant_ama" {  } { { "lpm_constant0.vhd" "" { Text "E:/yezi/design/dds/lpm_constant0.vhd" 43 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "2 lpm_constant0 " "Info: Found entity 2: lpm_constant0" {  } { { "lpm_constant0.vhd" "" { Text "E:/yezi/design/dds/lpm_constant0.vhd" 97 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_constant0 lpm_constant0:inst2 " "Info: Elaborating entity \"lpm_constant0\" for hierarchy \"lpm_constant0:inst2\"" {  } { { "dds.bdf" "inst2" { Schematic "E:/yezi/design/dds/dds.bdf" { { 144 -160 -64 192 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_constant0_lpm_constant_ama lpm_constant0:inst2\|lpm_constant0_lpm_constant_ama:lpm_constant0_lpm_constant_ama_component " "Info: Elaborating entity \"lpm_constant0_lpm_constant_ama\" for hierarchy \"lpm_constant0:inst2\|lpm_constant0_lpm_constant_ama:lpm_constant0_lpm_constant_ama_component\"" {  } { { "lpm_constant0.vhd" "lpm_constant0_lpm_constant_ama_component" { Text "E:/yezi/design/dds/lpm_constant0.vhd" 122 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd 3 1 " "Info: Found 3 design units, including 1 entities, in source file d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_mod_ram_rom_pack " "Info: Found design unit 1: sld_mod_ram_rom_pack" {  } { { "d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd" 4 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_mod_ram_rom-rtl " "Info: Found design unit 2: sld_mod_ram_rom-rtl" {  } { { "d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd" 72 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_mod_ram_rom " "Info: Found entity 1: sld_mod_ram_rom" {  } { { "d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "d:/altera/quartus72/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd" 16 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}