stp1.stp

DDs直接数字频率合成器的源代码

<session jtag_chain="USB-Blaster [USB-0]" jtag_device="@1: EP1C3 (0x020810DD)" sof_file="dds.sof" top_level_entity="dds">
  <display_tree gui_logging_enabled="0">
    <display_branch instance="auto_signaltap_0" log="USE_GLOBAL_TEMP" signal_set="USE_GLOBAL_TEMP" trigger="USE_GLOBAL_TEMP"/>
  </display_tree>
  <instance compilation_mode="full" entity_name="sld_signaltap" is_auto_node="yes" is_expanded="true" name="auto_signaltap_0" source_file="sld_signaltap.vhd">
    <node_ip_info instance_id="0" mfg_id="110" node_id="0" version="6"/>
    <signal_set global_temp="1" is_expanded="true" name="signal_set: 2008/03/04 20:53:46  #0">
      <clock name="clk" polarity="posedge" tap_mode="classic"/>
      <config ram_type="M4K" reserved_data_nodes="0" reserved_trigger_nodes="0" sample_depth="1024" trigger_in_enable="no" trigger_out_enable="no"/>
      <top_entity/>
      <signal_vec>
        <trigger_input_vec>
          <wire name="q_out[0]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[1]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[2]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[3]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[4]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[5]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[6]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[7]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[8]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[9]" tap_mode="classic" type="output pin"/>
        </trigger_input_vec>
        <data_input_vec>
          <wire name="q_out[0]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[1]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[2]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[3]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[4]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[5]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[6]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[7]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[8]" tap_mode="classic" type="output pin"/>
          <wire name="q_out[9]" tap_mode="classic" type="output pin"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="q_out" order="lsb_to_msb" radix="line_signed" state="collapse" type="output pin">
            <net is_signal_inverted="no" name="q_out[0]"/>
            <net is_signal_inverted="no" name="q_out[1]"/>
            <net is_signal_inverted="no" name="q_out[2]"/>
            <net is_signal_inverted="no" name="q_out[3]"/>
            <net is_signal_inverted="no" name="q_out[4]"/>
            <net is_signal_inverted="no" name="q_out[5]"/>
            <net is_signal_inverted="no" name="q_out[6]"/>
            <net is_signal_inverted="no" name="q_out[7]"/>
            <net is_signal_inverted="no" name="q_out[8]"/>
            <net is_signal_inverted="no" name="q_out[9]"/>
          </bus>
        </data_view>