dds.tan.rpt

DDs直接数字频率合成器的源代码

Classic Timing Analyzer report for dds
Tue Mar 04 20:55:51 2008
Quartus II Version 7.2 Build 203 02/05/2008 Service Pack 2 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'DPLL:inst4|altpll:altpll_component|_clk0'
  6. Clock Setup: 'clk'
  7. Clock Setup: 'altera_internal_jtag~TCKUTAP'
  8. Clock Hold: 'DPLL:inst4|altpll:altpll_component|_clk0'
  9. Clock Hold: 'clk'
 10. tsu
 11. tco
 12. tpd
 13. th
 14. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



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