dds.fit.eqn

DDs直接数字频率合成器的源代码

--operation mode is arithmetic

L3L13 = AMPP_FUNCTION(L3_word_counter[2], L3L10);


--L3_word_counter[4] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[4] at LC_X30_Y15_N4
--operation mode is normal

L3_word_counter[4] = AMPP_FUNCTION(A1L5, L3_word_counter[4], VCC, L3L6, L3L7, L3L15, L3L16);


--L3_word_counter[1] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1] at LC_X30_Y15_N1
--operation mode is arithmetic

L3_word_counter[1] = AMPP_FUNCTION(A1L5, L3_word_counter[1], VCC, L3L6, L3L7, L3L4, L3L5);

--L3L9 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]~247 at LC_X30_Y15_N1
--operation mode is arithmetic

L3L9 = AMPP_FUNCTION(L3_word_counter[1], L3L4);

--L3L10 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[1]~247COUT1_262 at LC_X30_Y15_N1
--operation mode is arithmetic

L3L10 = AMPP_FUNCTION(L3_word_counter[1], L3L5);


--L3L25 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~850 at LC_X30_Y15_N9
--operation mode is normal

L3L25 = AMPP_FUNCTION(L3_word_counter[1], L3_word_counter[4], L3_word_counter[2], L3_word_counter[0]);


--L3_word_counter[3] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3] at LC_X30_Y15_N3
--operation mode is arithmetic

L3_word_counter[3] = AMPP_FUNCTION(A1L5, L3_word_counter[3], VCC, L3L6, L3L7, L3L12, L3L13);

--L3L15 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3]~251 at LC_X30_Y15_N3
--operation mode is arithmetic

L3L15 = AMPP_FUNCTION(L3_word_counter[3], L3L12);

--L3L16 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|word_counter[3]~251COUT1_266 at LC_X30_Y15_N3
--operation mode is arithmetic

L3L16 = AMPP_FUNCTION(L3_word_counter[3], L3L13);


--L3L26 is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR~851 at LC_X30_Y15_N6
--operation mode is normal

L3L26 = AMPP_FUNCTION(L3_word_counter[1], L3_word_counter[0], L3_word_counter[4], L3_word_counter[3]);


--H1_jtag_debug_mode_usr0 is sld_hub:sld_hub_inst|jtag_debug_mode_usr0 at LC_X27_Y13_N4
--operation mode is normal

H1_jtag_debug_mode_usr0 = AMPP_FUNCTION(A1L5, A1L30, Q5_dffs[1], A1L31, Q5_dffs[0], VB1_state[0], VB1_state[12]);


--H1L28 is sld_hub:sld_hub_inst|jtag_debug_mode~2 at LC_X27_Y13_N7
--operation mode is normal

H1L28 = AMPP_FUNCTION(H1_jtag_debug_mode_usr1, H1_jtag_debug_mode_usr0);


--H1L2 is sld_hub:sld_hub_inst|comb~77 at LC_X27_Y13_N2
--operation mode is normal

H1L2 = AMPP_FUNCTION(H1_jtag_debug_mode_usr0, VB1_state[3], VB1_state[4], H1_jtag_debug_mode_usr1);


--H1L3 is sld_hub:sld_hub_inst|comb~78 at LC_X27_Y13_N5
--operation mode is normal

H1L3 = AMPP_FUNCTION(H1L2, TB3_Q[8], altera_internal_jtag, A1L7);


--H1L31 is sld_hub:sld_hub_inst|node_ena~40 at LC_X28_Y14_N0
--operation mode is normal

H1L31 = AMPP_FUNCTION(TB2_Q[0], TB8_Q[1]);


--TB4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[0] at LC_X29_Y11_N8
--operation mode is normal

TB4_Q[0] = AMPP_FUNCTION(A1L5, TB3_Q[0], TB2_Q[0], TB6_Q[0], H1_CLRN_SIGNAL, H1L23);


--B1_reset_all is sld_signaltap:auto_signaltap_0|reset_all at LC_X45_Y13_N5
--operation mode is normal

B1_reset_all = AMPP_FUNCTION(H1_CLRN_SIGNAL, TB4_Q[0]);


--TB6_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:2:S_IRF|Q[5] at LC_X29_Y11_N9
--operation mode is normal

TB6_Q[5] = AMPP_FUNCTION(A1L5, TB3_Q[5], H1_CLRN_SIGNAL, H1L4);


--TB3_Q[5] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[5] at LC_X29_Y12_N7
--operation mode is normal

TB3_Q[5] = AMPP_FUNCTION(A1L5, VB1_state[4], TB3_Q[6], H1_CLRN_SIGNAL, TB3L4);


--H1L23 is sld_hub:sld_hub_inst|IRF_ENABLE[2]~113 at LC_X28_Y11_N8
--operation mode is normal

H1L23 = AMPP_FUNCTION(H1L6, H1L22, TB8_Q[1], TB2_Q[0]);


--TB6_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:2:S_IRF|Q[3] at LC_X29_Y11_N4
--operation mode is normal

TB6_Q[3] = AMPP_FUNCTION(A1L5, TB3_Q[3], H1_CLRN_SIGNAL, H1L4);


--TB6_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:2:S_IRF|Q[4] at LC_X29_Y11_N2
--operation mode is normal

TB6_Q[4] = AMPP_FUNCTION(A1L5, TB3_Q[4], H1_CLRN_SIGNAL, H1L4);


--Q1_dffs[1] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[1] at LC_X29_Y14_N9
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

Q1_dffs[1] = AMPP_FUNCTION(A1L5, Q1_dffs[2], !B1_reset_all, GND, M1_trigger_setup_ena);


--B1L28 is sld_signaltap:auto_signaltap_0|sdr~21 at LC_X29_Y14_N6
--operation mode is normal

B1L28 = AMPP_FUNCTION(VB1_state[4], H1L31, H1_jtag_debug_mode, H1_jtag_debug_mode_usr1);


--M1_trigger_setup_ena is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|trigger_setup_ena at LC_X29_Y14_N5
--operation mode is normal

M1_trigger_setup_ena = AMPP_FUNCTION(TB4_Q[3], B1L28);


--L2_WORD_SR[1] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[1] at LC_X29_Y15_N7
--operation mode is normal

L2_WORD_SR[1] = AMPP_FUNCTION(A1L5, L3_clear_signal, L2_WORD_SR[2], VB1_state[4], L2L17, VCC, L2L15);


--L2_word_counter[1] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[1] at LC_X28_Y15_N3
--operation mode is normal

L2_word_counter[1] = AMPP_FUNCTION(A1L5, L2_word_counter[0], L2L8, L2_word_counter[1], VCC, L2L9);


--L2_word_counter[2] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[2] at LC_X28_Y15_N7
--operation mode is normal

L2_word_counter[2] = AMPP_FUNCTION(A1L5, L2L8, L2_word_counter[0], L2_word_counter[2], L2_word_counter[1], VCC, L2L9);


--L2_word_counter[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|word_counter[0] at LC_X28_Y15_N4
--operation mode is normal

L2_word_counter[0] = AMPP_FUNCTION(A1L5, L2_word_counter[0], L2L8, VCC, L2L9);


--L2L16 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR~884 at LC_X28_Y15_N9
--operation mode is normal

L2L16 = AMPP_FUNCTION(L2_word_counter[0], L2_word_counter[2], L2_word_counter[1]);


--L2L15 is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[3]~886 at LC_X29_Y14_N1
--operation mode is normal

L2L15 = AMPP_FUNCTION(L3_clear_signal, H1_jtag_debug_mode, H1L31, RB1L72);


--Q4_dffs[1] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[1] at LC_X32_Y17_N2
--operation mode is normal

Q4_dffs[1] = AMPP_FUNCTION(A1L5, HB1_safe_q[0], B1L28, Q4_dffs[2], !B1_reset_all);


--N1_is_max_write_address_ff is sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff at LC_X31_Y15_N4
--operation mode is normal

N1_is_max_write_address_ff = AMPP_FUNCTION(clk, N1_is_max_write_address_ff, HB1_cout, !B1_reset_all);


--RB1_constant_shift_reg[23] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[23] at LC_X37_Y11_N3
--operation mode is normal

RB1_constant_shift_reg[23] = AMPP_FUNCTION(A1L5, VB1_state[4], RB1_constant_update_reg[23], RB1_constant_shift_reg[24], RB1L76, VCC, RB1L19);


--RB1L73 is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|process1~22 at LC_X28_Y12_N7
--operation mode is normal

RB1L73 = AMPP_FUNCTION(VB1_state[5], RB1L76, TB5_Q[2]);


--RB1_constant_update_reg[22] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_update_reg[22] at LC_X37_Y11_N0
--operation mode is normal

RB1_constant_update_reg[22] = AMPP_FUNCTION(A1L5, RB1_constant_shift_reg[22], VCC, RB1L73);


--PB8_sout_node[5] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[5] at LC_X38_Y12_N7
--operation mode is arithmetic

PB8_sout_node[5]_carry_eqn = (!PB8L9 & PB8L14) # (PB8L9 & PB8L15);
PB8_sout_node[5]_lut_out = F1_ADDRLOCK[21] $ RB1_constant_update_reg[21] $ PB8_sout_node[5]_carry_eqn;
PB8_sout_node[5] = DFFEAS(PB8_sout_node[5]_lut_out, GLOBAL(SB1__clk0), VCC, , , , , , );

--PB8L17 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[5]~153 at LC_X38_Y12_N7
--operation mode is arithmetic

PB8L17_cout_0 = F1_ADDRLOCK[21] & !RB1_constant_update_reg[21] & !PB8L14 # !F1_ADDRLOCK[21] & (!PB8L14 # !RB1_constant_update_reg[21]);
PB8L17 = CARRY(PB8L17_cout_0);

--PB8L18 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[5]~153COUT1_198 at LC_X38_Y12_N7
--operation mode is arithmetic

PB8L18_cout_1 = F1_ADDRLOCK[21] & !RB1_constant_update_reg[21] & !PB8L15 # !F1_ADDRLOCK[21] & (!PB8L15 # !RB1_constant_update_reg[21]);
PB8L18 = CARRY(PB8L18_cout_1);


--F1_ADDRLOCK[20] is AddrLock:inst3|ADDRLOCK[20] at LC_X39_Y12_N6
--operation mode is arithmetic

F1_ADDRLOCK[20]_carry_eqn = (!F1L25 & F1L27) # (F1L25 & F1L28);
F1_ADDRLOCK[20]_lut_out = PB8_sout_node[4] $ (!F1_ADDRLOCK[20]_carry_eqn);
F1_ADDRLOCK[20] = DFFEAS(F1_ADDRLOCK[20]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L30 is AddrLock:inst3|ADDRLOCK[20]~179 at LC_X39_Y12_N6
--operation mode is arithmetic

F1L30_cout_0 = PB8_sout_node[4] & (!F1L27);
F1L30 = CARRY(F1L30_cout_0);

--F1L31 is AddrLock:inst3|ADDRLOCK[20]~179COUT1_234 at LC_X39_Y12_N6
--operation mode is arithmetic

F1L31_cout_1 = PB8_sout_node[4] & (!F1L28);
F1L31 = CARRY(F1L31_cout_1);


--RB1_constant_shift_reg[24] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[24] at LC_X37_Y11_N2
--operation mode is normal

RB1_constant_shift_reg[24] = AMPP_FUNCTION(A1L5, VB1_state[4], RB1L76, RB1_constant_shift_reg[25], RB1_constant_update_reg[24], VCC, RB1L19);


--RB1_constant_shift_reg[25] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[25] at LC_X37_Y11_N9
--operation mode is normal

RB1_constant_shift_reg[25] = AMPP_FUNCTION(A1L5, RB1_constant_shift_reg[26], RB1L76, RB1_constant_update_reg[25], VB1_state[4], VCC, RB1L19);


--RB1_constant_shift_reg[26] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[26] at LC_X36_Y11_N7
--operation mode is normal

RB1_constant_shift_reg[26] = AMPP_FUNCTION(A1L5, RB1_constant_shift_reg[27], RB1L76, VB1_state[4], RB1_constant_update_reg[26], VCC, RB1L19);


--RB1_constant_shift_reg[27] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[27] at LC_X36_Y11_N9
--operation mode is normal

RB1_constant_shift_reg[27] = AMPP_FUNCTION(A1L5, RB1_constant_shift_reg[28], RB1L76, VB1_state[4], RB1_constant_update_reg[27], VCC, RB1L19);


--RB1_constant_shift_reg[28] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[28] at LC_X36_Y11_N2
--operation mode is normal

RB1_constant_shift_reg[28] = AMPP_FUNCTION(A1L5, VB1_state[4], RB1_constant_update_reg[28], RB1L76, RB1_constant_shift_reg[29], VCC, RB1L19);


--RB1_constant_shift_reg[29] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[29] at LC_X36_Y11_N3
--operation mode is normal

RB1_constant_shift_reg[29] = AMPP_FUNCTION(A1L5, VB1_state[4], RB1_constant_update_reg[29], RB1L76, RB1_constant_shift_reg[30], VCC, RB1L19);


--RB1_constant_shift_reg[30] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[30] at LC_X36_Y1