dds51.map.eqn

DDs直接数字频率合成器的源代码

--altera_internal_jtag is altera_internal_jtag
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !H1_hub_tdo);


--WB1_state[5] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5]
--operation mode is normal

WB1_state[5] = AMPP_FUNCTION(A1L5, A1L7, WB1_state[4], WB1_state[3], VCC);


--UB6_Q[2] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[2]
--operation mode is normal

UB6_Q[2] = AMPP_FUNCTION(A1L5, UB9_Q[2], UB3_Q[2], UB2_Q[0], H1_CLRN_SIGNAL, H1L29);


--UB10_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]
--operation mode is normal

UB10_Q[0] = AMPP_FUNCTION(A1L5, UB3_Q[8], altera_internal_jtag, H1_CLRN_SIGNAL, H1L27);


--H1_jtag_debug_mode is sld_hub:sld_hub_inst|jtag_debug_mode
--operation mode is normal

H1_jtag_debug_mode = AMPP_FUNCTION(A1L5, H1L41, H1_jtag_debug_mode, H1L42, WB1_state[15], WB1_state[0]);


--UB2_Q[0] is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]
--operation mode is normal

UB2_Q[0] = AMPP_FUNCTION(A1L5, XB1_dffe1a[1], UB2_Q[0], UB11_Q[0], H1L1, H1_CLRN_SIGNAL);


--H1L43 is sld_hub:sld_hub_inst|node_ena~58
--operation mode is normal

H1L43 = AMPP_FUNCTION(UB10_Q[0], H1_jtag_debug_mode, UB2_Q[0]);


--H1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1
--operation mode is normal

H1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L5, Q5_dffs[1], A1L26, A1L27, Q5_dffs[0], WB1_state[0], WB1_state[12]);


--LB1L2 is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|enable_write~11
--operation mode is normal

LB1L2 = AMPP_FUNCTION(WB1_state[5], UB6_Q[2], H1L43, H1_jtag_debug_mode_usr1);


--F1_ADDRLOCK[23] is AddrLock:inst3|ADDRLOCK[23]
--operation mode is arithmetic

F1_ADDRLOCK[23]_carry_eqn = F1L31;
F1_ADDRLOCK[23]_lut_out = RB8_sout_node[7] $ (F1_ADDRLOCK[23]_carry_eqn);
F1_ADDRLOCK[23] = DFFEAS(F1_ADDRLOCK[23]_lut_out, clk, VCC, , , , , , );

--F1L33 is AddrLock:inst3|ADDRLOCK[23]~139
--operation mode is arithmetic

F1L33 = CARRY(!F1L31 # !RB8_sout_node[7]);


--F1_ADDRLOCK[24] is AddrLock:inst3|ADDRLOCK[24]
--operation mode is arithmetic

F1_ADDRLOCK[24]_carry_eqn = F1L33;
F1_ADDRLOCK[24]_lut_out = RB8_sout_node[8] $ (!F1_ADDRLOCK[24]_carry_eqn);
F1_ADDRLOCK[24] = DFFEAS(F1_ADDRLOCK[24]_lut_out, clk, VCC, , , , , , );

--F1L35 is AddrLock:inst3|ADDRLOCK[24]~143
--operation mode is arithmetic

F1L35 = CARRY(RB8_sout_node[8] & (!F1L33));


--F1_ADDRLOCK[25] is AddrLock:inst3|ADDRLOCK[25]
--operation mode is arithmetic

F1_ADDRLOCK[25]_carry_eqn = F1L35;
F1_ADDRLOCK[25]_lut_out = RB8_sout_node[9] $ (F1_ADDRLOCK[25]_carry_eqn);
F1_ADDRLOCK[25] = DFFEAS(F1_ADDRLOCK[25]_lut_out, clk, VCC, , , , , , );

--F1L37 is AddrLock:inst3|ADDRLOCK[25]~147
--operation mode is arithmetic

F1L37 = CARRY(!F1L35 # !RB8_sout_node[9]);


--F1_ADDRLOCK[26] is AddrLock:inst3|ADDRLOCK[26]
--operation mode is arithmetic

F1_ADDRLOCK[26]_carry_eqn = F1L37;
F1_ADDRLOCK[26]_lut_out = RB8_sout_node[10] $ (!F1_ADDRLOCK[26]_carry_eqn);
F1_ADDRLOCK[26] = DFFEAS(F1_ADDRLOCK[26]_lut_out, clk, VCC, , , , , , );

--F1L39 is AddrLock:inst3|ADDRLOCK[26]~151
--operation mode is arithmetic

F1L39 = CARRY(RB8_sout_node[10] & (!F1L37));


--F1_ADDRLOCK[27] is AddrLock:inst3|ADDRLOCK[27]
--operation mode is arithmetic

F1_ADDRLOCK[27]_carry_eqn = F1L39;
F1_ADDRLOCK[27]_lut_out = RB8_sout_node[11] $ (F1_ADDRLOCK[27]_carry_eqn);
F1_ADDRLOCK[27] = DFFEAS(F1_ADDRLOCK[27]_lut_out, clk, VCC, , , , , , );

--F1L41 is AddrLock:inst3|ADDRLOCK[27]~155
--operation mode is arithmetic

F1L41 = CARRY(!F1L39 # !RB8_sout_node[11]);


--F1_ADDRLOCK[28] is AddrLock:inst3|ADDRLOCK[28]
--operation mode is arithmetic

F1_ADDRLOCK[28]_carry_eqn = F1L41;
F1_ADDRLOCK[28]_lut_out = RB8_sout_node[12] $ (!F1_ADDRLOCK[28]_carry_eqn);
F1_ADDRLOCK[28] = DFFEAS(F1_ADDRLOCK[28]_lut_out, clk, VCC, , , , , , );

--F1L43 is AddrLock:inst3|ADDRLOCK[28]~159
--operation mode is arithmetic

F1L43 = CARRY(RB8_sout_node[12] & (!F1L41));


--F1_ADDRLOCK[29] is AddrLock:inst3|ADDRLOCK[29]
--operation mode is arithmetic

F1_ADDRLOCK[29]_carry_eqn = F1L43;
F1_ADDRLOCK[29]_lut_out = RB8_sout_node[13] $ (F1_ADDRLOCK[29]_carry_eqn);
F1_ADDRLOCK[29] = DFFEAS(F1_ADDRLOCK[29]_lut_out, clk, VCC, , , , , , );

--F1L45 is AddrLock:inst3|ADDRLOCK[29]~163
--operation mode is arithmetic

F1L45 = CARRY(!F1L43 # !RB8_sout_node[13]);


--F1_ADDRLOCK[30] is AddrLock:inst3|ADDRLOCK[30]
--operation mode is arithmetic

F1_ADDRLOCK[30]_carry_eqn = F1L45;
F1_ADDRLOCK[30]_lut_out = RB8_sout_node[14] $ (!F1_ADDRLOCK[30]_carry_eqn);
F1_ADDRLOCK[30] = DFFEAS(F1_ADDRLOCK[30]_lut_out, clk, VCC, , , , , , );

--F1L47 is AddrLock:inst3|ADDRLOCK[30]~167
--operation mode is arithmetic

F1L47 = CARRY(RB8_sout_node[14] & (!F1L45));


--F1_ADDROUT[8] is AddrLock:inst3|ADDROUT[8]
--operation mode is normal

F1_ADDROUT[8]_carry_eqn = F1L47;
F1_ADDROUT[8]_lut_out = RB8_sout_node[15] $ (F1_ADDROUT[8]_carry_eqn);
F1_ADDROUT[8] = DFFEAS(F1_ADDROUT[8]_lut_out, clk, VCC, , , , , , );


--LB1_ram_rom_data_reg[9] is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[9]
--operation mode is normal

LB1_ram_rom_data_reg[9] = AMPP_FUNCTION(A1L5, KB1_q_b[9], altera_internal_jtag, LB1L11, VCC, LB1L44);


--LB1_ram_rom_addr_reg[0] is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]
--operation mode is arithmetic

LB1_ram_rom_addr_reg[0] = AMPP_FUNCTION(A1L5, LB1_ram_rom_incr_addr, LB1_ram_rom_addr_reg[0], LB1_ram_rom_addr_reg[1], !UB6_Q[0], LB1L10);

--LB1L17 is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~136
--operation mode is arithmetic

LB1L17 = AMPP_FUNCTION(LB1_ram_rom_incr_addr, LB1_ram_rom_addr_reg[0]);


--LB1_ram_rom_addr_reg[1] is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]
--operation mode is arithmetic

LB1_ram_rom_addr_reg[1] = AMPP_FUNCTION(A1L5, LB1_ram_rom_addr_reg[1], LB1_ram_rom_addr_reg[2], !UB6_Q[0], LB1L10, LB1L17);

--LB1L19 is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~140
--operation mode is arithmetic

LB1L19 = AMPP_FUNCTION(LB1_ram_rom_addr_reg[1], LB1L17);


--LB1_ram_rom_addr_reg[2] is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]
--operation mode is arithmetic

LB1_ram_rom_addr_reg[2] = AMPP_FUNCTION(A1L5, LB1_ram_rom_addr_reg[2], LB1_ram_rom_addr_reg[3], !UB6_Q[0], LB1L10, LB1L19);

--LB1L21 is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]~144
--operation mode is arithmetic

LB1L21 = AMPP_FUNCTION(LB1_ram_rom_addr_reg[2], LB1L19);


--LB1_ram_rom_addr_reg[3] is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]
--operation mode is arithmetic

LB1_ram_rom_addr_reg[3] = AMPP_FUNCTION(A1L5, LB1_ram_rom_addr_reg[3], LB1_ram_rom_addr_reg[4], !UB6_Q[0], LB1L10, LB1L21);

--LB1L23 is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]~148
--operation mode is arithmetic

LB1L23 = AMPP_FUNCTION(LB1_ram_rom_addr_reg[3], LB1L21);


--LB1_ram_rom_addr_reg[4] is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]
--operation mode is arithmetic

LB1_ram_rom_addr_reg[4] = AMPP_FUNCTION(A1L5, LB1_ram_rom_addr_reg[4], LB1_ram_rom_addr_reg[5], !UB6_Q[0], LB1L10, LB1L23);

--LB1L25 is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]~152
--operation mode is arithmetic