dds51.fit.eqn

DDs直接数字频率合成器的源代码

A1L6 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !H1_hub_tdo);

--A1L7 is altera_internal_jtag~TMSUTAP at JTAG_X1_Y6_N1
A1L7 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !H1_hub_tdo);

--A1L5 is altera_internal_jtag~TCKUTAP at JTAG_X1_Y6_N1
A1L5 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !H1_hub_tdo);

--altera_internal_jtag is altera_internal_jtag at JTAG_X1_Y6_N1
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !H1_hub_tdo);


--WB1_state[5] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[5] at LC_X19_Y9_N1
--operation mode is normal

WB1_state[5] = AMPP_FUNCTION(A1L5, WB1_state[4], WB1_state[3], A1L7, VCC);


--UB6_Q[2] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[2] at LC_X19_Y8_N3
--operation mode is normal

UB6_Q[2] = AMPP_FUNCTION(A1L5, UB3_Q[2], UB9_Q[2], UB2_Q[0], H1_CLRN_SIGNAL, H1L29);


--UB10_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] at LC_X20_Y10_N0
--operation mode is normal

UB10_Q[0] = AMPP_FUNCTION(A1L5, altera_internal_jtag, UB3_Q[8], H1_CLRN_SIGNAL, H1L27);


--H1_jtag_debug_mode is sld_hub:sld_hub_inst|jtag_debug_mode at LC_X20_Y6_N3
--operation mode is normal

H1_jtag_debug_mode = AMPP_FUNCTION(A1L5, WB1_state[15], H1L41, H1L42, H1_jtag_debug_mode, WB1_state[0]);


--UB2_Q[0] is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0] at LC_X19_Y9_N8
--operation mode is normal

UB2_Q[0] = AMPP_FUNCTION(A1L5, UB11_Q[0], UB2_Q[0], H1L1, XB1_dffe1a[1], H1_CLRN_SIGNAL);


--H1L43 is sld_hub:sld_hub_inst|node_ena~58 at LC_X19_Y7_N3
--operation mode is normal

H1L43 = AMPP_FUNCTION(H1_jtag_debug_mode, UB2_Q[0], UB10_Q[0]);


--H1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1 at LC_X19_Y6_N1
--operation mode is normal

H1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L5, A1L26, A1L27, Q5_dffs[0], Q5_dffs[1], WB1_state[0], WB1_state[12]);


--LB1L2 is lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_p0u:auto_generated|sld_mod_ram_rom:mgl_prim2|enable_write~11 at LC_X19_Y9_N0
--operation mode is normal

LB1L2 = AMPP_FUNCTION(H1_jtag_debug_mode_usr1, H1L43, WB1_state[5], UB6_Q[2]);


--F1_ADDRLOCK[23] is AddrLock:inst3|ADDRLOCK[23] at LC_X11_Y8_N9
--operation mode is arithmetic

F1_ADDRLOCK[23]_carry_eqn = (!F1L25 & F1L36) # (F1L25 & F1L37);
F1_ADDRLOCK[23]_lut_out = RB8_sout_node[7] $ F1_ADDRLOCK[23]_carry_eqn;
F1_ADDRLOCK[23] = DFFEAS(F1_ADDRLOCK[23]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L39 is AddrLock:inst3|ADDRLOCK[23]~139 at LC_X11_Y8_N9
--operation mode is arithmetic

F1L39 = CARRY(!F1L37 # !RB8_sout_node[7]);


--F1_ADDRLOCK[24] is AddrLock:inst3|ADDRLOCK[24] at LC_X11_Y7_N0
--operation mode is arithmetic

F1_ADDRLOCK[24]_carry_eqn = F1L39;
F1_ADDRLOCK[24]_lut_out = RB8_sout_node[8] $ !F1_ADDRLOCK[24]_carry_eqn;
F1_ADDRLOCK[24] = DFFEAS(F1_ADDRLOCK[24]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L41 is AddrLock:inst3|ADDRLOCK[24]~143 at LC_X11_Y7_N0
--operation mode is arithmetic

F1L41_cout_0 = RB8_sout_node[8] & !F1L39;
F1L41 = CARRY(F1L41_cout_0);

--F1L42 is AddrLock:inst3|ADDRLOCK[24]~143COUT1_240 at LC_X11_Y7_N0
--operation mode is arithmetic

F1L42_cout_1 = RB8_sout_node[8] & !F1L39;
F1L42 = CARRY(F1L42_cout_1);


--F1_ADDRLOCK[25] is AddrLock:inst3|ADDRLOCK[25] at LC_X11_Y7_N1
--operation mode is arithmetic

F1_ADDRLOCK[25]_carry_eqn = (!F1L39 & F1L41) # (F1L39 & F1L42);
F1_ADDRLOCK[25]_lut_out = RB8_sout_node[9] $ (F1_ADDRLOCK[25]_carry_eqn);
F1_ADDRLOCK[25] = DFFEAS(F1_ADDRLOCK[25]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L44 is AddrLock:inst3|ADDRLOCK[25]~147 at LC_X11_Y7_N1
--operation mode is arithmetic

F1L44_cout_0 = !F1L41 # !RB8_sout_node[9];
F1L44 = CARRY(F1L44_cout_0);

--F1L45 is AddrLock:inst3|ADDRLOCK[25]~147COUT1_242 at LC_X11_Y7_N1
--operation mode is arithmetic

F1L45_cout_1 = !F1L42 # !RB8_sout_node[9];
F1L45 = CARRY(F1L45_cout_1);


--F1_ADDRLOCK[26] is AddrLock:inst3|ADDRLOCK[26] at LC_X11_Y7_N2
--operation mode is arithmetic

F1_ADDRLOCK[26]_carry_eqn = (!F1L39 & F1L44) # (F1L39 & F1L45);
F1_ADDRLOCK[26]_lut_out = RB8_sout_node[10] $ (!F1_ADDRLOCK[26]_carry_eqn);
F1_ADDRLOCK[26] = DFFEAS(F1_ADDRLOCK[26]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L47 is AddrLock:inst3|ADDRLOCK[26]~151 at LC_X11_Y7_N2
--operation mode is arithmetic

F1L47_cout_0 = RB8_sout_node[10] & (!F1L44);
F1L47 = CARRY(F1L47_cout_0);

--F1L48 is AddrLock:inst3|ADDRLOCK[26]~151COUT1_244 at LC_X11_Y7_N2
--operation mode is arithmetic

F1L48_cout_1 = RB8_sout_node[10] & (!F1L45);
F1L48 = CARRY(F1L48_cout_1);


--F1_ADDRLOCK[27] is AddrLock:inst3|ADDRLOCK[27] at LC_X11_Y7_N3
--operation mode is arithmetic

F1_ADDRLOCK[27]_carry_eqn = (!F1L39 & F1L47) # (F1L39 & F1L48);
F1_ADDRLOCK[27]_lut_out = RB8_sout_node[11] $ (F1_ADDRLOCK[27]_carry_eqn);
F1_ADDRLOCK[27] = DFFEAS(F1_ADDRLOCK[27]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L50 is AddrLock:inst3|ADDRLOCK[27]~155 at LC_X11_Y7_N3
--operation mode is arithmetic

F1L50_cout_0 = !F1L47 # !RB8_sout_node[11];
F1L50 = CARRY(F1L50_cout_0);

--F1L51 is AddrLock:inst3|ADDRLOCK[27]~155COUT1_246 at LC_X11_Y7_N3
--operation mode is arithmetic

F1L51_cout_1 = !F1L48 # !RB8_sout_node[11];
F1L51 = CARRY(F1L51_cout_1);


--F1_ADDRLOCK[28] is AddrLock:inst3|ADDRLOCK[28] at LC_X11_Y7_N4
--operation mode is arithmetic

F1_ADDRLOCK[28]_carry_eqn = (!F1L39 & F1L50) # (F1L39 & F1L51);
F1_ADDRLOCK[28]_lut_out = RB8_sout_node[12] $ !F1_ADDRLOCK[28]_carry_eqn;
F1_ADDRLOCK[28] = DFFEAS(F1_ADDRLOCK[28]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L53 is AddrLock:inst3|ADDRLOCK[28]~159 at LC_X11_Y7_N4
--operation mode is arithmetic

F1L53 = CARRY(RB8_sout_node[12] & !F1L51);


--F1_ADDRLOCK[29] is AddrLock:inst3|ADDRLOCK[29] at LC_X11_Y7_N5
--operation mode is arithmetic

F1_ADDRLOCK[29]_carry_eqn = F1L53;
F1_ADDRLOCK[29]_lut_out = RB8_sout_node[13] $ F1_ADDRLOCK[29]_carry_eqn;
F1_ADDRLOCK[29] = DFFEAS(F1_ADDRLOCK[29]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L55 is AddrLock:inst3|ADDRLOCK[29]~163 at LC_X11_Y7_N5
--operation mode is arithmetic

F1L55_cout_0 = !F1L53 # !RB8_sout_node[13];
F1L55 = CARRY(F1L55_cout_0);

--F1L56 is AddrLock:inst3|ADDRLOCK[29]~163COUT1_248 at LC_X11_Y7_N5
--operation mode is arithmetic

F1L56_cout_1 = !F1L53 # !RB8_sout_node[13];
F1L56 = CARRY(F1L56_cout_1);


--F1_ADDRLOCK[30] is AddrLock:inst3|ADDRLOCK[30] at LC_X11_Y7_N6
--operation mode is arithmetic

F1_ADDRLOCK[30]_carry_eqn = (!F1L53 & F1L55) # (F1L53 & F1L56);
F1_ADDRLOCK[30]_lut_out = RB8_sout_node[14] $ (!F1_ADDRLOCK[30]_carry_eqn);
F1_ADDRLOCK[30] = DFFEAS(F1_ADDRLOCK[30]_lut_out, GLOBAL(clk), VCC, , , , , , );

--F1L58 is AddrLock:inst3|ADDRLOCK[30]~167 at LC_X11_Y7_N6
--operation mode is arithmetic

F1L58_cout_0 = RB8_sout_node[14] & (!F1L55);