📄 register.h
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/*********************************************************************
* Filename: f2407_c.h CHange by Todd,for f240 (ADC WD CoreR) *
* *
* Author: David M. Alter, Texas Instruments Inc. *
* *
* Last Modified: 03/14/01 *
* *
* Description: LF2407 DSP register definitions for C-code. *
*********************************************************************/
/* Core registers */
#define IMR *(volatile unsigned int *)0x0004 /* Interrupt mask reg */
#define GREG *(volatile unsigned int *)0x0005 /* Global memory allocation reg */
#define IFR *(volatile unsigned int *)0x0006 /* Interrupt flag reg */
/*PLL */
#define CKCR0 *(volatile unsigned int *)0x702A /**/
#define CKCR1 *(volatile unsigned int *)0x702C /**/
/*DIG I/O*/
#define OCRA *(volatile unsigned int *)0x7090 /**/
#define OCRB *(volatile unsigned int *)0x7092 /**/
#define ISRA *(volatile unsigned int *)0x7094 /**/
#define ISRB *(volatile unsigned int *)0x7096 /**/
#define PADATDIR *(volatile unsigned int *)0x7098 /**/
#define PBDATDIR *(volatile unsigned int *)0x709A /**/
#define PCDATDIR *(volatile unsigned int *)0x709C /**/
#define PDDATDIR *(volatile unsigned int *)0x709E /**/
/* Watchdog timer (WD) registers */
#define WDCNTR *(volatile unsigned int *)0x7023 /* WD counter reg */
#define WDKEY *(volatile unsigned int *)0x7025 /* WD reset key reg */
#define WDCR *(volatile unsigned int *)0x7029 /* WD timer control reg */
/* Serial Peripheral Interface (SPI) registers */
#define SPICCR *(volatile unsigned int *)0x7040 /* SPI configuration control reg */
#define SPICTL *(volatile unsigned int *)0x7041 /* SPI operation control reg */
#define SPISTS *(volatile unsigned int *)0x7042 /* SPI status reg */
#define SPIBRR *(volatile unsigned int *)0x7044 /* SPI baud rate reg */
#define SPIRXEMU *(volatile unsigned int *)0x7046 /* SPI emulation buffer reg */
#define SPIRXBUF *(volatile unsigned int *)0x7047 /* SPI serial receive buffer reg */
#define SPITXBUF *(volatile unsigned int *)0x7048 /* SPI serial transmit buffer reg */
#define SPIDAT *(volatile unsigned int *)0x7049 /* SPI serial data reg */
#define SPIPRI *(volatile unsigned int *)0x704F /* SPI priority control reg */
/* SCI registers */
#define SCICCR *(volatile unsigned int *)0x7050 /* SCI communication control reg */
#define SCICTL1 *(volatile unsigned int *)0x7051 /* SCI control reg 1 */
#define SCIHBAUD *(volatile unsigned int *)0x7052 /* SCI baud-select reg, high bits */
#define SCILBAUD *(volatile unsigned int *)0x7053 /* SCI baud-select reg, low bits */
#define SCICTL2 *(volatile unsigned int *)0x7054 /* SCI control reg 2 */
#define SCIRXST *(volatile unsigned int *)0x7055 /* SCI receiver status reg */
#define SCIRXEMU *(volatile unsigned int *)0x7056 /* SCI emulation data buffer reg */
#define SCIRXBUF *(volatile unsigned int *)0x7057 /* SCI receiver data buffer reg */
#define SCITXBUF *(volatile unsigned int *)0x7059 /* SCI transmit data buffer reg */
#define SCIPRI *(volatile unsigned int *)0x705F /* SCI priority control reg */
/* External interrupt configuration registers */
#define XINT1CR *(volatile unsigned int *)0x7070 /* Ext interrupt 1 config reg */
#define XINT2CR *(volatile unsigned int *)0x7071 /* Ext interrupt 2 config reg */
/* Analog-to-Digital Converter (ADC) registers */
#define ADCTRL1 *(volatile unsigned int *)0x7032 /* ADC control reg 1 */
#define ADCTRL2 *(volatile unsigned int *)0x7034 /* ADC control reg 2 */
#define ADCFIFO1 *(volatile unsigned int *)0x7036 /*F240*/
#define ADCFIFO2 *(volatile unsigned int *)0x7038 /*F240*/
#define ADCRESULT1 *(volatile unsigned int *)0x703A /*F240*/
#define ADCRESULT2 *(volatile unsigned int *)0x703C /* F240 */
/* Controller Area Network (CAN) registers */
#define MDER *(volatile unsigned int *)0x7100 /* CAN mailbox direction/enable reg */
#define TCR *(volatile unsigned int *)0x7101 /* CAN transmission control reg */
#define RCR *(volatile unsigned int *)0x7102 /* CAN receive control reg */
#define MCR *(volatile unsigned int *)0x7103 /* CAN master control reg */
#define BCR2 *(volatile unsigned int *)0x7104 /* CAN bit config reg 2 */
#define BCR1 *(volatile unsigned int *)0x7105 /* CAN bit config reg 1 */
#define ESR *(volatile unsigned int *)0x7106 /* CAN error status reg */
#define GSR *(volatile unsigned int *)0x7107 /* CAN global status reg */
#define CEC *(volatile unsigned int *)0x7108 /* CAN trans and rcv err counters */
#define CAN_IFR *(volatile unsigned int *)0x7109 /* CAN interrupt flag reg */
#define CAN_IMR *(volatile unsigned int *)0x710a /* CAN interrupt mask reg */
#define LAM0_H *(volatile unsigned int *)0x710b /* CAN local acceptance mask MBX0/1 */
#define LAM0_L *(volatile unsigned int *)0x710c /* CAN local acceptance mask MBX0/1 */
#define LAM1_H *(volatile unsigned int *)0x710d /* CAN local acceptance mask MBX2/3 */
#define LAM1_L *(volatile unsigned int *)0x710e /* CAN local acceptance mask MBX2/3 */
#define MSGID0L *(volatile unsigned int *)0x7200 /* CAN message ID for mailbox 0 (lower 16 bits) */
#define MSGID0H *(volatile unsigned int *)0x7201 /* CAN message ID for mailbox 0 (upper 16 bits) */
#define MSGCTRL0 *(volatile unsigned int *)0x7202 /* CAN RTR and DLC for mailbox 0 */
#define MBX0A *(volatile unsigned int *)0x7204 /* CAN 2 of 8 bytes of mailbox 0 */
#define MBX0B *(volatile unsigned int *)0x7205 /* CAN 2 of 8 bytes of mailbox 0 */
#define MBX0C *(volatile unsigned int *)0x7206 /* CAN 2 of 8 bytes of mailbox 0 */
#define MBX0D *(volatile unsigned int *)0x7207 /* CAN 2 of 8 bytes of mailbox 0 */
#define MSGID1L *(volatile unsigned int *)0x7208 /* CAN message ID for mailbox 1 (lower 16 bits) */
#define MSGID1H *(volatile unsigned int *)0x7209 /* CAN message ID for mailbox 1 (upper 16 bits) */
#define MSGCTRL1 *(volatile unsigned int *)0x720A /* CAN RTR and DLC for mailbox 1 */
#define MBX1A *(volatile unsigned int *)0x720C /* CAN 2 of 8 bytes of mailbox 1 */
#define MBX1B *(volatile unsigned int *)0x720D /* CAN 2 of 8 bytes of mailbox 1 */
#define MBX1C *(volatile unsigned int *)0x720E /* CAN 2 of 8 bytes of mailbox 1 */
#define MBX1D *(volatile unsigned int *)0x720F /* CAN 2 of 8 bytes of mailbox 1 */
#define MSGID2L *(volatile unsigned int *)0x7210 /* CAN message ID for mailbox 2 (lower 16 bits) */
#define MSGID2H *(volatile unsigned int *)0x7211 /* CAN message ID for mailbox 2 (upper 16 bits) */
#define MSGCTRL2 *(volatile unsigned int *)0x7212 /* CAN RTR and DLC for mailbox 2 */
#define MBX2A *(volatile unsigned int *)0x7214 /* CAN 2 of 8 bytes of mailbox 2 */
#define MBX2B *(volatile unsigned int *)0x7215 /* CAN 2 of 8 bytes of mailbox 2 */
#define MBX2C *(volatile unsigned int *)0x7216 /* CAN 2 of 8 bytes of mailbox 2 */
#define MBX2D *(volatile unsigned int *)0x7217 /* CAN 2 of 8 bytes of mailbox 2 */
#define MSGID3L *(volatile unsigned int *)0x7218 /* CAN message ID for mailbox 3 (lower 16 bits) */
#define MSGID3H *(volatile unsigned int *)0x7219 /* CAN message ID for mailbox 3 (upper 16 bits) */
#define MSGCTRL3 *(volatile unsigned int *)0x721A /* CAN RTR and DLC for mailbox 3 */
#define MBX3A *(volatile unsigned int *)0x721C /* CAN 2 of 8 bytes of mailbox 3 */
#define MBX3B *(volatile unsigned int *)0x721D /* CAN 2 of 8 bytes of mailbox 3 */
#define MBX3C *(volatile unsigned int *)0x721E /* CAN 2 of 8 bytes of mailbox 3 */
#define MBX3D *(volatile unsigned int *)0x721F /* CAN 2 of 8 bytes of mailbox 3 */
#define MSGID4L *(volatile unsigned int *)0x7220 /* CAN message ID for mailbox 4 (lower 16 bits) */
#define MSGID4H *(volatile unsigned int *)0x7221 /* CAN message ID for mailbox 4 (upper 16 bits) */
#define MSGCTRL4 *(volatile unsigned int *)0x7222 /* CAN RTR and DLC for mailbox 4 */
#define MBX4A *(volatile unsigned int *)0x7224 /* CAN 2 of 8 bytes of mailbox 4 */
#define MBX4B *(volatile unsigned int *)0x7225 /* CAN 2 of 8 bytes of mailbox 4 */
#define MBX4C *(volatile unsigned int *)0x7226 /* CAN 2 of 8 bytes of mailbox 4 */
#define MBX4D *(volatile unsigned int *)0x7227 /* CAN 2 of 8 bytes of mailbox 4 */
#define MSGID5L *(volatile unsigned int *)0x7228 /* CAN message ID for mailbox 5 (lower 16 bits) */
#define MSGID5H *(volatile unsigned int *)0x7229 /* CAN message ID for mailbox 5 (upper 16 bits) */
#define MSGCTRL5 *(volatile unsigned int *)0x722A /* CAN RTR and DLC for mailbox 5 */
#define MBX5A *(volatile unsigned int *)0x722C /* CAN 2 of 8 bytes of mailbox 5 */
#define MBX5B *(volatile unsigned int *)0x722D /* CAN 2 of 8 bytes of mailbox 5 */
#define MBX5C *(volatile unsigned int *)0x722E /* CAN 2 of 8 bytes of mailbox 5 */
#define MBX5D *(volatile unsigned int *)0x722F /* CAN 2 of 8 bytes of mailbox 5 */
/* Event Manager GPTIMES registers */
#define GPTCON *(volatile unsigned int *)0x7400 /* GP timer control reg A */
#define T1CNT *(volatile unsigned int *)0x7401 /* GP timer 1 counter reg */
#define T1CMPR *(volatile unsigned int *)0x7402 /* GP timer 1 compare reg */
#define T1PR *(volatile unsigned int *)0x7403 /* GP timer 1 period reg */
#define T1CON *(volatile unsigned int *)0x7404 /* GP timer 1 control reg */
#define T2CNT *(volatile unsigned int *)0x7405 /* GP timer 2 counter reg */
#define T2CMPR *(volatile unsigned int *)0x7406 /* GP timer 2 compare reg */
#define T2PR *(volatile unsigned int *)0x7407 /* GP timer 2 period reg */
#define T2CON *(volatile unsigned int *)0x7408 /* GP timer 2 control reg */
#define T3CNT *(volatile unsigned int *)0x7409
#define T3CMPR *(volatile unsigned int *)0x740A
#define T3PR *(volatile unsigned int *)0x740B
#define T3CON *(volatile unsigned int *)0x740C
/*Event Manager CMP UNITS R &SCMP UNITS R*/
#define COMCON *(volatile unsigned int *)0x7411
#define ACTR *(volatile unsigned int *)0x7413
#define SACTR *(volatile unsigned int *)0x7414
#define DBTCON *(volatile unsigned int *)0x7415
#define CMPR1 *(volatile unsigned int *)0x7417
#define CMPR2 *(volatile unsigned int *)0x7418
#define CMPR3 *(volatile unsigned int *)0x7419
#define SCMPR1 *(volatile unsigned int *)0x741A
#define SCMPR2 *(volatile unsigned int *)0x741B
#define SCMPR3 *(volatile unsigned int *)0x741C
/*Event Manager CAPTURE UNIT*/
#define CAPCON *(volatile unsigned int *)0x7420
#define CAPFIFO *(volatile unsigned int *)0x7422
#define CAP1FIFO *(volatile unsigned int *)0x7423
#define CAP2FIFO *(volatile unsigned int *)0x7424
#define CAP3FIFO *(volatile unsigned int *)0x7435
#define CAP4FIFO *(volatile unsigned int *)0x7436
/*Event Manager INTERUPTER CONTROL LOGIC R*/
#define EVIMRA *(volatile unsigned int *)0x742C
#define EVIMRB *(volatile unsigned int *)0x742D
#define EVIMRC *(volatile unsigned int *)0x742E
#define EVIFRA *(volatile unsigned int *)0x742F
#define EVIFRB *(volatile unsigned int *)0x7430
#define EVIFRC *(volatile unsigned int *)0x7431
#define EVIVRA *(volatile unsigned int *)0x7432
#define EVIVRB *(volatile unsigned int *)0x7433
#define EVIVRC *(volatile unsigned int *)0x7434
/* I/O space mapped registers */
#define FCMR portFF0F /* Flash control mode register */
ioport unsigned int portFF0F; /* C2xx compiler specific keyword */
#define WSGR portFFFF /* Wait-state generator reg */
ioport unsigned int portFFFF; /* C2xx compiler specific keyword */⌨️ 快捷键说明
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