standard.map.rpt

郑亚民版的可编程逻辑器件开发软件quatus ii里的一些例程

Analysis & Synthesis report for standard
Fri Oct 28 18:12:42 2005
Version 5.0 Build 168 06/22/2005 Service Pack 1.04 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Source Files Read
  5. Analysis & Synthesis Resource Usage Summary
  6. Analysis & Synthesis Resource Utilization by Entity
  7. Analysis & Synthesis RAM Summary
  8. State Machine - |standard|standard_1c6:inst3|sdram:the_sdram|i_state
  9. State Machine - |standard|standard_1c6:inst3|sdram:the_sdram|i_next
 10. State Machine - |standard|standard_1c6:inst3|sdram:the_sdram|m_state
 11. State Machine - |standard|standard_1c6:inst3|sdram:the_sdram|m_next
 12. State Machine - |standard|standard_1c6:inst3|i2c_master:the_i2c_master|oc_i2c_master:the_oc_i2c_master|i2c_master_top:i2c_top_inst|i2c_master_byte_ctrl:u1|\statemachine:c_state
 13. State Machine - |standard|standard_1c6:inst3|i2c_master:the_i2c_master|oc_i2c_master:the_oc_i2c_master|i2c_master_top:i2c_top_inst|i2c_master_byte_ctrl:u1|i2c_master_bit_ctrl:u1|c_state
 14. State Machine - |standard|standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|DRsize
 15. Registers Protected by SYN_PRESERVE, DONT_TOUCH
 16. General Register Statistics
 17. Inverted Register Statistics
 18. Multiplexer Restructuring Statistics (Restructuring Performed)
 19. Parameter Settings for User Entity Instance: PLL:inst|altpll:altpll_component
 20. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_ic_data_module:cpu_0_ic_data
 21. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_ic_data_module:cpu_0_ic_data|altsyncram:the_altsyncram
 22. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_ic_tag_module:cpu_0_ic_tag
 23. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_ic_tag_module:cpu_0_ic_tag|altsyncram:the_altsyncram
 24. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_register_bank_a_module:cpu_0_register_bank_a
 25. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_register_bank_a_module:cpu_0_register_bank_a|altsyncram:the_altsyncram
 26. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_register_bank_b_module:cpu_0_register_bank_b
 27. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_register_bank_b_module:cpu_0_register_bank_b|altsyncram:the_altsyncram
 28. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component
 29. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 30. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_im:the_cpu_0_nios2_oci_im|cpu_0_traceram_lpm_dram_bdp_component_module:cpu_0_traceram_lpm_dram_bdp_component
 31. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_im:the_cpu_0_nios2_oci_im|cpu_0_traceram_lpm_dram_bdp_component_module:cpu_0_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 32. Parameter Settings for User Entity Instance: standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1
 33. Parameter Settings for User Entity Instance: standard_1c6:inst3|epcs_controller:the_epcs_controller|altsyncram:the_boot_copier_rom
 34. Parameter Settings for User Entity Instance: standard_1c6:inst3|i2c_master:the_i2c_master|oc_i2c_master:the_oc_i2c_master|i2c_master_top:i2c_top_inst
 35. Parameter Settings for User Entity Instance: standard_1c6:inst3|i2c_master:the_i2c_master|oc_i2c_master:the_oc_i2c_master|i2c_master_top:i2c_top_inst|i2c_master_byte_ctrl:u1
 36. Parameter Settings for User Entity Instance: standard_1c6:inst3|i2c_master:the_i2c_master|oc_i2c_master:the_oc_i2c_master|i2c_master_top:i2c_top_inst|i2c_master_byte_ctrl:u1|i2c_master_bit_ctrl:u1
 37. Parameter Settings for User Entity Instance: standard_1c6:inst3|jtag_uart:the_jtag_uart|jtag_uart_scfifo_w:the_jtag_uart_scfifo_w|scfifo:wfifo
 38. Parameter Settings for User Entity Instance: standard_1c6:inst3|jtag_uart:the_jtag_uart|jtag_uart_scfifo_r:the_jtag_uart_scfifo_r|scfifo:rfifo
 39. Parameter Settings for User Entity Instance: standard_1c6:inst3|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic
 40. Parameter Settings for User Entity Instance: standard_1c6:inst3|pwm:the_pwm|pwm_avalon_interface:the_pwm_avalon_interface
 41. Parameter Settings for User Entity Instance: standard_1c6:inst3|pwm:the_pwm|pwm_avalon_interface:the_pwm_avalon_interface|pwm_register_file:memory_element
 42. Parameter Settings for User Entity Instance: delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component
 43. Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst
 44. scfifo Parameter Settings by Entity Instance
 45. Analysis & Synthesis Equations
 46. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic       
functions, and any output files any of the foregoing           
(including device programming or simulation files), and any    
associated documentation or information are expressly subject  
to the terms and conditions of the Altera Program License      
Subscription Agreement, Altera MegaCore Function License