📄 component_builder_logfile.txt
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direction = "input";
type = "chipselect_n";
is_shared = "0";
}
PORT data
{
width = "8";
width_expression = "";
direction = "inout";
type = "data";
is_shared = "1";
}
}
}
}
MODULE_DEFAULTS
{
class = "devicesopc_k9f2808u0c";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "0";
Top_Level_Ports_Are_Enumerated = "1";
}
COMPONENT_BUILDER
{
GLS_SETTINGS
{
}
}
PORT_WIRING
{
}
SIMULATION
{
DISPLAY
{
}
}
WIZARD_SCRIPT_ARGUMENTS
{
hdl_parameters
{
addr = "8";
}
}
SLAVE avalon_tristate_slave
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon_tristate";
Address_Width = "2";
Address_Alignment = "native";
Data_Width = "8";
Has_Base_Address = "1";
Has_IRQ = "0";
Setup_Time = "30ns";
Hold_Time = "30ns";
Read_Wait_States = "500ns";
Write_Wait_States = "500ns";
Read_Latency = "0";
Maximum_Pending_Read_Transactions = "0";
Is_Printable_Device = "0";
Is_Memory_Device = "0";
Is_Readable = "1";
Is_Writable = "1";
Minimum_Uninterrupted_Run_Length = "1";
}
COMPONENT_BUILDER
{
ATS_SETTINGS
{
Setup_Value = "30";
Read_Wait_Value = "500";
Write_Wait_Value = "500";
Hold_Value = "30";
Timing_Units = "ns";
Read_Latency_Value = "0";
Max_Pending_Read_Transactions_Value = "1";
Address_Alignment = "native";
Is_Printable_Device = "0";
interface_name = "Avalon Tristate Slave";
Minimum_Arbitration_Shares = "1";
external_wait = "0";
Is_Memory_Device = "0";
}
}
PORT_WIRING
{
PORT addr
{
width = "2";
width_expression = "";
direction = "input";
type = "address";
is_shared = "1";
}
PORT write_n
{
width = "1";
width_expression = "";
direction = "input";
type = "write_n";
is_shared = "0";
}
PORT read_n
{
width = "1";
width_expression = "";
direction = "input";
type = "read_n";
is_shared = "0";
}
PORT chipselect_n
{
width = "1";
width_expression = "";
direction = "input";
type = "chipselect_n";
is_shared = "0";
}
PORT data
{
width = "8";
width_expression = "";
direction = "inout";
type = "data";
is_shared = "1";
}
}
}
}
MODULE_DEFAULTS
{
class = "pwm_avalon_interface";
class_version = "1.0";
SYSTEM_BUILDER_INFO
{
Instantiate_In_System_Module = "1";
Top_Level_Ports_Are_Enumerated = "1";
}
COMPONENT_BUILDER
{
GLS_SETTINGS
{
}
}
PORT_WIRING
{
}
SIMULATION
{
DISPLAY
{
SIGNAL x101
{
name = "pwm_avalon_interface/global_signals";
format = "Divider";
}
SIGNAL x102
{
name = "pwm_avalon_interface/control_slave";
format = "Divider";
}
SIGNAL x103
{
name = "clk";
}
SIGNAL x104
{
name = "resetn";
}
SIGNAL x105
{
name = "avalon_chip_select";
}
SIGNAL x106
{
name = "address";
radix = "hexadecimal";
}
SIGNAL x107
{
name = "write";
}
SIGNAL x108
{
name = "write_data";
radix = "hexadecimal";
}
SIGNAL x109
{
name = "read";
}
SIGNAL x110
{
name = "read_data";
radix = "hexadecimal";
}
SIGNAL x111
{
name = "pwm_out";
}
}
}
WIZARD_SCRIPT_ARGUMENTS
{
hdl_parameters
{
clock_divide_reg_init = "0x00000000";
duty_cycle_reg_init = "0x00000000";
}
}
SLAVE control_slave
{
SYSTEM_BUILDER_INFO
{
Bus_Type = "avalon";
Address_Width = "2";
Address_Alignment = "dynamic";
Data_Width = "32";
Has_Base_Address = "1";
Has_IRQ = "0";
Setup_Time = "0cycles";
Hold_Time = "0cycles";
Read_Wait_States = "0cycles";
Write_Wait_States = "0cycles";
Read_Latency = "0";
Maximum_Pending_Read_Transactions = "0";
Is_Printable_Device = "0";
Is_Memory_Device = "1";
Is_Readable = "1";
Is_Writable = "1";
Minimum_Uninterrupted_Run_Length = "1";
}
COMPONENT_BUILDER
{
AVS_SETTINGS
{
Setup_Value = "0";
Read_Wait_Value = "0";
Write_Wait_Value = "0";
Hold_Value = "0";
Timing_Units = "cycles";
Read_Latency_Value = "0";
Max_Pending_Read_Transactions_Value = "1";
Address_Alignment = "dynamic";
Is_Printable_Device = "0";
interface_name = "Avalon Slave";
Minimum_Arbitration_Shares = "1";
external_wait = "0";
Is_Memory_Device = "1";
}
}
PORT_WIRING
{
PORT clk
{
width = "1";
width_expression = "";
direction = "input";
type = "clk";
is_shared = "0";
}
PORT resetn
{
width = "1";
width_expression = "";
direction = "input";
type = "reset_n";
is_shared = "0";
}
PORT avalon_chip_select
{
width = "1";
width_expression = "";
direction = "input";
type = "chipselect";
is_shared = "0";
}
PORT address
{
width = "2";
width_expression = "";
direction = "input";
type = "address";
is_shared = "0";
}
PORT write
{
width = "1";
width_expression = "";
direction = "input";
type = "write";
is_shared = "0";
}
PORT write_data
{
width = "32";
width_expression = "";
direction = "input";
type = "writedata";
is_shared = "0";
}
PORT read
{
width = "1";
width_expression = "";
direction = "input";
type = "read";
is_shared = "0";
}
PORT read_data
{
width = "32";
width_expression = "";
direction = "output";
type = "readdata";
is_shared = "0";
}
PORT pwm_out
{
width = "1";
width_expression = "";
direction = "output";
type = "export";
is_shared = "0";
}
}
}
}
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