standard.tan.summary

郑亚民版的可编程逻辑器件开发软件quatus ii里的一些例程

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 9.339 ns
From           : P0[26]
To             : standard_1c6:inst3|p0_7_p0_30:the_p0_7_p0_30|readdata[19]
From Clock     : 
To Clock       : SYS_CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 9.826 ns
From           : standard_1c6:inst3|ext_mem_bus_avalon_slave_arbitrator:the_ext_mem_bus_avalon_slave|select_n_to_the_S1D13503_Register~_Duplicate_1
To             : Ext_Bus_nEN
From Clock     : SYS_CLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 10.144 ns
From           : NF_nBUSY
To             : NF_nCS
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 1.166 ns
From           : altera_internal_jtag~SHIFTUSER
To             : standard_1c6:inst3|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|st_shiftdr
From Clock     : 
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 0.924 ns
From           : PLL:inst|altpll:altpll_component|_extclk0
To             : SDRAM_CLK
From Clock     : SYS_CLK
To Clock       : 
Failed Paths   : 0

Type           : Worst-case Minimum tpd
Slack          : N/A
Required Time  : None
Actual Time    : 2.124 ns
From           : altera_internal_jtag~TDO
To             : altera_reserved_tdo
From Clock     : 
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'PLL:inst|altpll:altpll_component|_clk0'
Slack          : 0.335 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : 48.79 MHz ( period = 20.498 ns )
From           : standard_1c6:inst3|cpu_0:the_cpu_0|ic_fill_tag[14]
To             : standard_1c6:inst3|ext_mem_bus_avalon_slave_arbitrator:the_ext_mem_bus_avalon_slave|ext_mem_bus_address[17]
From Clock     : PLL:inst|altpll:altpll_component|_clk0
To Clock       : PLL:inst|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack          : 4.852 ns
Required Time  : 55.00 MHz ( period = 18.181 ns )
Actual Time    : 117.98 MHz ( period = 8.476 ns )
From           : sld_hub:sld_hub_inst|jtag_debug_mode
To             : standard_1c6:inst3|jtag_uart:the_jtag_uart|alt_jtag_atlantic:jtag_uart_alt_jtag_atlantic|jupdate
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Setup: 'SYS_CLK'
Slack          : 16.062 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : 209.60 MHz ( period = 4.771 ns )
From           : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0]
To             : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[0]
From Clock     : SYS_CLK
To Clock       : SYS_CLK
Failed Paths   : 0

Type           : Clock Hold: 'PLL:inst|altpll:altpll_component|_clk0'
Slack          : 0.822 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : standard_1c6:inst3|cpu_0:the_cpu_0|ic_fill_dp_offset[1]
To             : standard_1c6:inst3|cpu_0:the_cpu_0|ic_fill_dp_offset[1]
From Clock     : PLL:inst|altpll:altpll_component|_clk0
To Clock       : PLL:inst|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Clock Hold: 'altera_internal_jtag~TCKUTAP'
Slack          : 0.871 ns
Required Time  : 55.00 MHz ( period = 18.181 ns )
Actual Time    : N/A
From           : sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[1]
To             : sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Hold: 'SYS_CLK'
Slack          : 1.314 ns
Required Time  : 48.00 MHz ( period = 20.833 ns )
Actual Time    : N/A
From           : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[9]
To             : delay_reset_block:inst6|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_df8:auto_generated|safe_q[9]
From Clock     : SYS_CLK
To Clock       : SYS_CLK
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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