test_led.tan.qmsg

郑亚民版的可编程逻辑器件开发软件quatus ii里的一些例程

{ "Info" "ITDB_FULL_TCO_RESULT" "CLK LED_PIO first_nios2_system:inst\|LED_PIO:the_LED_PIO\|out_port 9.275 ns register " "Info: tco from clock \"CLK\" to destination pin \"LED_PIO\" through register \"first_nios2_system:inst\|LED_PIO:the_LED_PIO\|out_port\" is 9.275 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 2.903 ns + Longest register " "Info: + Longest clock path from clock \"CLK\" to source register is 2.903 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_G1 1345 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_G1; Fanout = 1345; CLK Node = 'CLK'" {  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "" { CLK } "NODE_NAME" } "" } } { "Test_LED.bdf" "" { Schematic "E:/QProj/Test_LED/Test_LED.bdf" { { 88 -16 152 104 "CLK" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.723 ns) + CELL(0.711 ns) 2.903 ns first_nios2_system:inst\|LED_PIO:the_LED_PIO\|out_port 2 REG LC_X14_Y6_N4 1 " "Info: 2: + IC(0.723 ns) + CELL(0.711 ns) = 2.903 ns; Loc. = LC_X14_Y6_N4; Fanout = 1; REG Node = 'first_nios2_system:inst\|LED_PIO:the_LED_PIO\|out_port'" {  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "1.434 ns" { CLK first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port } "NODE_NAME" } "" } } { "LED_PIO.vhd" "" { Text "E:/QProj/Test_LED/LED_PIO.vhd" 32 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 75.09 % " "Info: Total cell delay = 2.180 ns ( 75.09 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.723 ns 24.91 % " "Info: Total interconnect delay = 0.723 ns ( 24.91 % )" {  } {  } 0}  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "2.903 ns" { CLK first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.903 ns" { CLK CLK~out0 first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port } { 0.000ns 0.000ns 0.723ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "LED_PIO.vhd" "" { Text "E:/QProj/Test_LED/LED_PIO.vhd" 32 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.148 ns + Longest register pin " "Info: + Longest register to pin delay is 6.148 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns first_nios2_system:inst\|LED_PIO:the_LED_PIO\|out_port 1 REG LC_X14_Y6_N4 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X14_Y6_N4; Fanout = 1; REG Node = 'first_nios2_system:inst\|LED_PIO:the_LED_PIO\|out_port'" {  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "" { first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port } "NODE_NAME" } "" } } { "LED_PIO.vhd" "" { Text "E:/QProj/Test_LED/LED_PIO.vhd" 32 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.040 ns) + CELL(2.108 ns) 6.148 ns LED_PIO 2 PIN PIN_A2 0 " "Info: 2: + IC(4.040 ns) + CELL(2.108 ns) = 6.148 ns; Loc. = PIN_A2; Fanout = 0; PIN Node = 'LED_PIO'" {  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "6.148 ns" { first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port LED_PIO } "NODE_NAME" } "" } } { "Test_LED.bdf" "" { Schematic "E:/QProj/Test_LED/Test_LED.bdf" { { 136 416 592 152 "LED_PIO" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.108 ns 34.29 % " "Info: Total cell delay = 2.108 ns ( 34.29 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.040 ns 65.71 % " "Info: Total interconnect delay = 4.040 ns ( 65.71 % )" {  } {  } 0}  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "6.148 ns" { first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port LED_PIO } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.148 ns" { first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port LED_PIO } { 0.000ns 4.040ns } { 0.000ns 2.108ns } } }  } 0}  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "2.903 ns" { CLK first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.903 ns" { CLK CLK~out0 first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port } { 0.000ns 0.000ns 0.723ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "6.148 ns" { first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port LED_PIO } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.148 ns" { first_nios2_system:inst|LED_PIO:the_LED_PIO|out_port LED_PIO } { 0.000ns 4.040ns } { 0.000ns 2.108ns } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "altera_internal_jtag~TDO altera_reserved_tdo 2.124 ns Longest " "Info: Longest tpd from source pin \"altera_internal_jtag~TDO\" to destination pin \"altera_reserved_tdo\" is 2.124 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TDO 1 PIN JTAG_X1_Y10_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y10_N1; Fanout = 1; PIN Node = 'altera_internal_jtag~TDO'" {  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.124 ns) 2.124 ns altera_reserved_tdo 2 PIN PIN_H15 0 " "Info: 2: + IC(0.000 ns) + CELL(2.124 ns) = 2.124 ns; Loc. = PIN_H15; Fanout = 0; PIN Node = 'altera_reserved_tdo'" {  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorplan "E:/QProj/Test_LED/" "" "2.124 ns" { altera_internal_jtag~TDO altera_reserved_tdo } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.124 ns 100.00 % " "Info: Total cell delay = 2.124 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" "" { Report "E:/QProj/Test_LED/db/Test_LED_cmp.qrpt" Compiler "Test_LED" "UNKNOWN" "V1" "E:/QProj/Test_LED/db/Test_LED.quartus_db" { Floorpl