pipemult.tan.qmsg

郑亚民版的可编程逻辑器件开发软件quatus ii里的一些例程

{ "Info" "ITDB_FULL_TCO_RESULT" "clk q\[9\] ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|ram_block1a15~portb_address_reg0 9.761 ns memory " "Info: tco from clock \"clk\" to destination pin \"q\[9\]\" through memory \"ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|ram_block1a15~portb_address_reg0\" is 9.761 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.243 ns + Longest memory " "Info: + Longest clock path from clock \"clk\" to source memory is 2.243 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk 1 CLK PIN_H1 130 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_H1; Fanout = 130; CLK Node = 'clk'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "" { clk } "NODE_NAME" } "" } } { "pipemult.bdf" "" { Schematic "D:/QProj/topmult/pipemult/pipemult.bdf" { { 24 -56 112 40 "clk" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.560 ns) + CELL(0.553 ns) 2.243 ns ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|ram_block1a15~portb_address_reg0 2 MEM M4K_X17_Y1 16 " "Info: 2: + IC(0.560 ns) + CELL(0.553 ns) = 2.243 ns; Loc. = M4K_X17_Y1; Fanout = 16; MEM Node = 'ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|ram_block1a15~portb_address_reg0'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "1.113 ns" { clk ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_j6b1.tdf" "" { Text "D:/QProj/topmult/pipemult/db/altsyncram_j6b1.tdf" 494 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.683 ns 75.03 % " "Info: Total cell delay = 1.683 ns ( 75.03 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.560 ns 24.97 % " "Info: Total interconnect delay = 0.560 ns ( 24.97 % )" {  } {  } 0}  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "2.243 ns" { clk ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.243 ns" { clk clk~out0 ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 } { 0.000ns 0.000ns 0.560ns } { 0.000ns 1.130ns 0.553ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" {  } { { "db/altsyncram_j6b1.tdf" "" { Text "D:/QProj/topmult/pipemult/db/altsyncram_j6b1.tdf" 494 2 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.018 ns + Longest memory pin " "Info: + Longest memory to pin delay is 7.018 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|ram_block1a15~portb_address_reg0 1 MEM M4K_X17_Y1 16 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X17_Y1; Fanout = 16; MEM Node = 'ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|ram_block1a15~portb_address_reg0'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "" { ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_j6b1.tdf" "" { Text "D:/QProj/topmult/pipemult/db/altsyncram_j6b1.tdf" 494 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.321 ns) 3.321 ns ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|q_b\[9\] 2 MEM M4K_X17_Y1 1 " "Info: 2: + IC(0.000 ns) + CELL(3.321 ns) = 3.321 ns; Loc. = M4K_X17_Y1; Fanout = 1; MEM Node = 'ram:inst1\|altsyncram:altsyncram_component\|altsyncram_j6b1:auto_generated\|q_b\[9\]'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "3.321 ns" { ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|q_b[9] } "NODE_NAME" } "" } } { "db/altsyncram_j6b1.tdf" "" { Text "D:/QProj/topmult/pipemult/db/altsyncram_j6b1.tdf" 40 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.063 ns) + CELL(1.634 ns) 7.018 ns q\[9\] 3 PIN PIN_N4 0 " "Info: 3: + IC(2.063 ns) + CELL(1.634 ns) = 7.018 ns; Loc. = PIN_N4; Fanout = 0; PIN Node = 'q\[9\]'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "3.697 ns" { ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|q_b[9] q[9] } "NODE_NAME" } "" } } { "pipemult.bdf" "" { Schematic "D:/QProj/topmult/pipemult/pipemult.bdf" { { 208 648 824 224 "q\[15..0\]" "" } } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.955 ns 70.60 % " "Info: Total cell delay = 4.955 ns ( 70.60 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.063 ns 29.40 % " "Info: Total interconnect delay = 2.063 ns ( 29.40 % )" {  } {  } 0}  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "7.018 ns" { ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|q_b[9] q[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.018 ns" { ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|q_b[9] q[9] } { 0.000ns 0.000ns 2.063ns } { 0.000ns 3.321ns 1.634ns } } }  } 0}  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "2.243 ns" { clk ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.243 ns" { clk clk~out0 ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 } { 0.000ns 0.000ns 0.560ns } { 0.000ns 1.130ns 0.553ns } } } { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "7.018 ns" { ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|q_b[9] q[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.018 ns" { ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|ram_block1a15~portb_address_reg0 ram:inst1|altsyncram:altsyncram_component|altsyncram_j6b1:auto_generated|q_b[9] q[9] } { 0.000ns 0.000ns 2.063ns } { 0.000ns 3.321ns 1.634ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "mult:inst\|lpm_mult:lpm_mult_component\|multcore:mult_core\|decoder_node\[3\]\[2\] datab\[3\] clk -0.734 ns register " "Info: th for register \"mult:inst\|lpm_mult:lpm_mult_component\|multcore:mult_core\|decoder_node\[3\]\[2\]\" (data pin = \"datab\[3\]\", clock pin = \"clk\") is -0.734 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.237 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 2.237 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk 1 CLK PIN_H1 130 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_H1; Fanout = 130; CLK Node = 'clk'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "" { clk } "NODE_NAME" } "" } } { "pipemult.bdf" "" { Schematic "D:/QProj/topmult/pipemult/pipemult.bdf" { { 24 -56 112 40 "clk" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.560 ns) + CELL(0.547 ns) 2.237 ns mult:inst\|lpm_mult:lpm_mult_component\|multcore:mult_core\|decoder_node\[3\]\[2\] 2 REG LC_X22_Y3_N2 3 " "Info: 2: + IC(0.560 ns) + CELL(0.547 ns) = 2.237 ns; Loc. = LC_X22_Y3_N2; Fanout = 3; REG Node = 'mult:inst\|lpm_mult:lpm_mult_component\|multcore:mult_core\|decoder_node\[3\]\[2\]'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "1.107 ns" { clk mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } "NODE_NAME" } "" } } { "multcore.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/multcore.tdf" 247 20 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.677 ns 74.97 % " "Info: Total cell delay = 1.677 ns ( 74.97 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.560 ns 25.03 % " "Info: Total interconnect delay = 0.560 ns ( 25.03 % )" {  } {  } 0}  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "2.237 ns" { clk mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.237 ns" { clk clk~out0 mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } { 0.000ns 0.000ns 0.560ns } { 0.000ns 1.130ns 0.547ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.012 ns + " "Info: + Micro hold delay of destination is 0.012 ns" {  } { { "multcore.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/multcore.tdf" 247 20 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.983 ns - Shortest pin register " "Info: - Shortest pin to register delay is 2.983 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns datab\[3\] 1 PIN PIN_H16 8 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_H16; Fanout = 8; PIN Node = 'datab\[3\]'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "" { datab[3] } "NODE_NAME" } "" } } { "pipemult.bdf" "" { Schematic "D:/QProj/topmult/pipemult/pipemult.bdf" { { 80 -56 112 96 "datab\[7..0\]" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.615 ns) + CELL(0.238 ns) 2.983 ns mult:inst\|lpm_mult:lpm_mult_component\|multcore:mult_core\|decoder_node\[3\]\[2\] 2 REG LC_X22_Y3_N2 3 " "Info: 2: + IC(1.615 ns) + CELL(0.238 ns) = 2.983 ns; Loc. = LC_X22_Y3_N2; Fanout = 3; REG Node = 'mult:inst\|lpm_mult:lpm_mult_component\|multcore:mult_core\|decoder_node\[3\]\[2\]'" {  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "1.853 ns" { datab[3] mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } "NODE_NAME" } "" } } { "multcore.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/multcore.tdf" 247 20 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.368 ns 45.86 % " "Info: Total cell delay = 1.368 ns ( 45.86 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.615 ns 54.14 % " "Info: Total interconnect delay = 1.615 ns ( 54.14 % )" {  } {  } 0}  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "2.983 ns" { datab[3] mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.983 ns" { datab[3] datab[3]~out0 mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } { 0.000ns 0.000ns 1.615ns } { 0.000ns 1.130ns 0.238ns } } }  } 0}  } { { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "2.237 ns" { clk mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.237 ns" { clk clk~out0 mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } { 0.000ns 0.000ns 0.560ns } { 0.000ns 1.130ns 0.547ns } } } { "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" "" { Report "D:/QProj/topmult/pipemult/db/pipemult_cmp.qrpt" Compiler "pipemult" "UNKNOWN" "V1" "D:/QProj/topmult/pipemult/db/pipemult.quartus_db" { Floorplan "D:/QProj/topmult/pipemult/" "" "2.983 ns" { datab[3] mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.983 ns" { datab[3] datab[3]~out0 mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|decoder_node[3][2] } { 0.000ns 0.000ns 1.615ns } { 0.000ns 1.130ns 0.238ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Dec 24 12:55:44 2005 " "Info: Processing ended: Sat Dec 24 12:55:44 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}