addere.srs

郑亚民版的可编程逻辑器件开发软件quatus ii里的一些例程

#
#
#
# Created by Synplify VHDL Compiler version Compilers 2.8.1, Build 050R from Synplicity, Inc.
# Copyright 1994-2004 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Thu May 04 11:26:56 2006
#
#
#OPTIONS:"|-top|AdderE|-ram|-fixsmult|-sm|-fid2|-sharing|off|-encrypt|-dfltencoding|onehot|-ui|-lite|-pro|-lib|work|-lib|work"
#CUR:"D:\\Synplicity\\Synplify_771\\bin\\c_vhdl.exe":1097050622l
#CUR:"D:\\Synplicity\\Synplify_771\\lib\\vhd\\location.map":1094175956l
#CUR:"D:\\Synplicity\\Synplify_771\\lib\\vhd\\std.vhd":1076513986l
#CUR:"D:\\Synplicity\\Synplify_771\\lib\\vhd\\std.vhd":1076513986l
#CUR:"E:\\QProj\\AdderE\\Full_Adder.vhd":1140003728l
#CUR:"E:\\QProj\\AdderE\\Full_Adder.vhd":1140003728l
#CUR:"E:\\QProj\\AdderE\\AdderE.vhd":1140003726l
#CUR:"E:\\QProj\\AdderE\\AdderE.vhd":1140003726l
f "D:\Synplicity\Synplify_771\lib\vhd\std.vhd"; # file 0
f "E:\QProj\AdderE\Full_Adder.vhd"; # file 1
f "E:\QProj\AdderE\AdderE.vhd"; # file 2
@E
@ 
ftell;
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---------------------------------@-
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;