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📄 ctc_tx_arb.v

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///*********************************************************************
/// Copyright(c) 2006, ZTE.
/// All rights reserved.
///
/// Project name : ZXMBW-250(WIMAX)
/// File name    : ctc_tx_arb.v
/// Author       : wangjinshan  yuanliuqing
/// Department   : 2nd IC department
/// Email        : wang.jinshan1@zte.com.cn
///
/// Module_name  : ctc_tx_arb
/// Called by    : ctc_tx_fsm  module
///---------------------------------------------------------------------
/// Module Hiberarchy:
/// none
///---------------------------------------------------------------------
///
/// Release History:
///---------------------------------------------------------------------
/// Version     |    Date     |       Author Description
///---------------------------------------------------------------------
/// 1.0-0       | 2006-06-10  | 建立文件
///---------------------------------------------------------------------
/// 1.1-0       | 2006-10-09  | 更改为3个译码核
///---------------------------------------------------------------------
// Main Function:
/// 1、CTC译码核输出仲裁
///*********************************************************************

`timescale 1ns/100ps

module ctc_tx_arb
    (
    ///interface signals with ctc_decoder_core1
    ///input
    input              ctc_fifo1_empty,             ///read request signal
    input              core1_poll,                  ///轮循信号
    ///output
    output reg         core1_gnt,                   ///read grant signal

    ///interface signals with ctc_decoder_core2
    ///input
    input              ctc_fifo2_empty,             ///read request signal
    input              core2_poll,                  ///轮循信号
    ///output
    output reg         core2_gnt,                   ///read grant signal

    ///interface signals with ctc_decoder_core3
    ///input
    input              ctc_fifo3_empty,             ///read request signal
    input              core3_poll,                  ///轮循信号
    ///output
    output reg         core3_gnt,                   ///read grant signal

     //interface with post_ctc_fifo
     //input
    input       [8:0]  wrusedword_post_ctc_fifo,

    ///system signals
    input              sys_clk,                     ///系统时钟信号
    input              reset_b                      ///输入复位信号
    );

///*********************************************************************
///local parameter define:(本地参数:)
///*********************************************************************
parameter       POST_FIFO_THRESHOLD = 9'd340;       ///512-152=360 (152=4800-b/32+2)
parameter       IDLE                = 3'b001;
parameter       SEARCH              = 3'b010;
parameter       ST_WAIT             = 3'b100;

///*********************************************************************
///内部信号定义
///*********************************************************************
reg     [1:0]   current_point;                      ///current point for request
reg             schedule_succ;                      ///schedule is success
/// State codes definitions:
reg     [2:0]   st_current;
reg     [2:0]   st_next;
reg             schedule_succ_next;
reg     [1:0]   current_point_next;

/// NextState logic (combinatorial)
/// The state machine (seperate the state machine from the output process)
/// State machine with separate computation processes
always @(*) begin
    st_next               = st_current;
    case (st_current)
        IDLE:   st_next     = SEARCH;
        SEARCH:
        begin
            if(schedule_succ_next)
                st_next       = ST_WAIT;
            else
                st_next       = SEARCH;
        end
        ST_WAIT:
        begin
            if (core1_poll || core2_poll || core3_poll)                st_next       = SEARCH;            else
                st_next       = ST_WAIT;
        end
        default: st_next    = IDLE;
    endcase
end

/// Current State Logic (sequential)
/// state_intialization
always @ (posedge sys_clk or negedge reset_b) begin
    if (~reset_b)
        st_current     <= IDLE;
    else
        st_current     <= st_next;
end

///output the schedule gnt
reg             core1_gnt_next;
reg             core2_gnt_next;
reg             core3_gnt_next;
always @(*) begin                                   ///Set default values for outputs and signals
    core1_gnt_next    = core1_gnt;
    core2_gnt_next    = core2_gnt;
    core3_gnt_next    = core3_gnt;
    if (st_current == SEARCH && schedule_succ_next)
    begin
        case (current_point_next)
            2'b00: core1_gnt_next        = 1'b1;
            2'b01: core2_gnt_next        = 1'b1;
            2'b10: core3_gnt_next        = 1'b1;
            default:
            begin
                core1_gnt_next    = core1_gnt;
                core2_gnt_next    = core2_gnt;
                core3_gnt_next    = core3_gnt;
            end
        endcase
    end
    else
    begin 
        if(st_current == ST_WAIT && core1_poll)            core1_gnt_next      = 1'b0;        else
        begin 
            if(st_current == ST_WAIT && core2_poll)                core2_gnt_next      = 1'b0;
            else
            begin
                if(st_current == ST_WAIT && core3_poll)                    core3_gnt_next      = 1'b0;
            end
        end
    end
end                                                 ///output the schedule gnt

///Registered outputs logic
always @(posedge sys_clk or negedge reset_b) begin
    if(~reset_b)
    begin
        core1_gnt    <= 1'b0;
        core2_gnt    <= 1'b0;
        core3_gnt    <= 1'b0;
    end
    else
    begin
        core1_gnt   <= core1_gnt_next;
        core2_gnt   <= core2_gnt_next;
        core3_gnt   <= core3_gnt_next;
    end
end                                                 ///Registered outputs

///Schedule process
always @(*) begin
    schedule_succ_next       = schedule_succ;
    current_point_next       = current_point;
    if (st_current == SEARCH)
    begin
        case (current_point)
            2'b00: begin
                if (!ctc_fifo2_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                begin
                    schedule_succ_next    = 1'b1;
                    current_point_next    = 2'b01;
                end
                else
                begin
                    if (!ctc_fifo3_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                    begin
                        schedule_succ_next    = 1'b1;
                        current_point_next    = 2'b10;
                    end
                    else
                    begin
                        if (!ctc_fifo1_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                        begin
                            schedule_succ_next    = 1'b1;
                            current_point_next    = 2'b00;
                        end
                        else
                        begin
                            schedule_succ_next    = 1'b0;
                            current_point_next    = 2'b00;
                        end
                    end
                end
            end
            2'b01: begin
                if (!ctc_fifo3_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                begin
                    schedule_succ_next    = 1'b1;
                    current_point_next    = 2'b10;
                end
                else
                begin
                    if (!ctc_fifo1_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                    begin
                        schedule_succ_next    = 1'b1;
                        current_point_next    = 2'b00;
                    end
                    else
                    begin
                        if (!ctc_fifo2_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                        begin
                            schedule_succ_next    = 1'b1;
                            current_point_next    = 2'b01;
                        end
                        else
                        begin
                            schedule_succ_next    = 1'b0;
                            current_point_next    = 2'b01;
                        end
                    end
                end
            end
            2'b10: begin
                if (!ctc_fifo1_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                begin
                    schedule_succ_next    = 1'b1;
                    current_point_next    = 2'b00;
                end
                else
                begin
                    if (!ctc_fifo2_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                    begin
                        schedule_succ_next    = 1'b1;
                        current_point_next    = 2'b01;
                    end
                    else
                    begin
                        if (!ctc_fifo3_empty && (wrusedword_post_ctc_fifo < POST_FIFO_THRESHOLD))
                        begin
                            schedule_succ_next    = 1'b1;
                            current_point_next    = 2'b10;
                        end
                        else
                        begin
                            schedule_succ_next    = 1'b0;
                            current_point_next    = 2'b10;
                        end
                    end
                end
            end
            default: begin
                schedule_succ_next    = 1'b0;
                current_point_next    = 2'b00;
            end
        endcase
    end
end                                                 ///arbiter schedule

///Registered outputs logic
always @ (posedge sys_clk or negedge reset_b) begin
    if(~reset_b)
    begin
        schedule_succ          <= 1'b0;
        current_point          <= 2'b00;
    end
    else
    begin
        schedule_succ          <= schedule_succ_next;
        current_point          <= current_point_next;
    end
end                                                 ///Registered outputs
endmodule ///ctc_tx_arb

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