_primary.vhd

上传的是WIMAX系统中

library verilog;
use verilog.vl_types.all;
entity mod_max4_b_7 is
    port(
        r5_10           : out    vl_logic;
        gamma10_c_8     : in     vl_logic;
        gamma10_c_7     : in     vl_logic;
        gamma10_c_6     : in     vl_logic;
        gamma10_c_5     : in     vl_logic;
        gamma10_c_4     : in     vl_logic;
        gamma10_c_3     : in     vl_logic;
        gamma10_c_2     : in     vl_logic;
        gamma10_c_1     : in     vl_logic;
        gamma10_c_0     : in     vl_logic;
        beta7_c_11      : in     vl_logic;
        beta7_c_8       : in     vl_logic;
        beta7_c_9       : in     vl_logic;
        beta7_c_10      : in     vl_logic;
        beta7_c_7       : in     vl_logic;
        beta7_c_6       : in     vl_logic;
        beta7_c_5       : in     vl_logic;
        beta7_c_4       : in     vl_logic;
        beta7_c_3       : in     vl_logic;
        beta7_c_2       : in     vl_logic;
        beta7_c_1       : in     vl_logic;
        beta7_c_0       : in     vl_logic;
        gamma1_c_8      : in     vl_logic;
        gamma1_c_7      : in     vl_logic;
        gamma1_c_6      : in     vl_logic;
        gamma1_c_5      : in     vl_logic;
        gamma1_c_4      : in     vl_logic;
        gamma1_c_3      : in     vl_logic;
        gamma1_c_2      : in     vl_logic;
        gamma1_c_1      : in     vl_logic;
        gamma1_c_0      : in     vl_logic;
        beta3_c_11      : in     vl_logic;
        beta3_c_8       : in     vl_logic;
        beta3_c_9       : in     vl_logic;
        beta3_c_10      : in     vl_logic;
        beta3_c_7       : in     vl_logic;
        beta3_c_6       : in     vl_logic;
        beta3_c_5       : in     vl_logic;
        beta3_c_4       : in     vl_logic;
        beta3_c_3       : in     vl_logic;
        beta3_c_2       : in     vl_logic;
        beta3_c_1       : in     vl_logic;
        beta3_c_0       : in     vl_logic;
        gamma6_c_8      : in     vl_logic;
        gamma6_c_7      : in     vl_logic;
        gamma6_c_6      : in     vl_logic;
        gamma6_c_5      : in     vl_logic;
        gamma6_c_4      : in     vl_logic;
        gamma6_c_3      : in     vl_logic;
        gamma6_c_2      : in     vl_logic;
        gamma6_c_1      : in     vl_logic;
        gamma6_c_0      : in     vl_logic;
        beta4_c_11      : in     vl_logic;
        beta4_c_8       : in     vl_logic;
        beta4_c_9       : in     vl_logic;
        beta4_c_10      : in     vl_logic;
        beta4_c_7       : in     vl_logic;
        beta4_c_6       : in     vl_logic;
        beta4_c_5       : in     vl_logic;
        beta4_c_4       : in     vl_logic;
        beta4_c_3       : in     vl_logic;
        beta4_c_2       : in     vl_logic;
        beta4_c_1       : in     vl_logic;
        beta4_c_0       : in     vl_logic;
        r3_10           : out    vl_logic;
        r1_10           : out    vl_logic;
        r0_10           : out    vl_logic;
        r4_10           : out    vl_logic;
        beta72_11       : in     vl_logic;
        beta72_10       : in     vl_logic;
        beta72_9        : in     vl_logic;
        beta72_8        : in     vl_logic;
        beta72_7        : in     vl_logic;
        beta72_6        : in     vl_logic;
        beta72_5        : in     vl_logic;
        beta72_4        : in     vl_logic;
        beta72_3        : in     vl_logic;
        beta72_2        : in     vl_logic;
        beta72_1        : in     vl_logic;
        beta72_0        : in     vl_logic;
        beta71_11       : in     vl_logic;
        beta71_10       : in     vl_logic;
        beta71_9        : in     vl_logic;
        beta71_8        : in     vl_logic;
        beta71_7        : in     vl_logic;
        beta71_6        : in     vl_logic;
        beta71_5        : in     vl_logic;
        beta71_4        : in     vl_logic;
        beta71_3        : in     vl_logic;
        beta71_2        : in     vl_logic;
        beta71_1        : in     vl_logic;
        beta71_0        : in     vl_logic;
        beta70_11       : in     vl_logic;
        beta70_10       : in     vl_logic;
        beta70_9        : in     vl_logic;
        beta70_8        : in     vl_logic;
        beta70_7        : in     vl_logic;
        beta70_6        : in     vl_logic;
        beta70_5        : in     vl_logic;
        beta70_4        : in     vl_logic;
        beta70_3        : in     vl_logic;
        beta70_2        : in     vl_logic;
        beta70_1        : in     vl_logic;
        beta70_0        : in     vl_logic;
        beta73_11       : in     vl_logic;
        beta73_10       : in     vl_logic;
        beta73_9        : in     vl_logic;
        beta73_8        : in     vl_logic;
        beta73_7        : in     vl_logic;
        beta73_6        : in     vl_logic;
        beta73_5        : in     vl_logic;
        beta73_4        : in     vl_logic;
        beta73_3        : in     vl_logic;
        beta73_2        : in     vl_logic;
        beta73_1        : in     vl_logic;
        beta73_0        : in     vl_logic;
        beta_t7_11      : out    vl_logic;
        beta_t7_10      : out    vl_logic;
        beta_t7_9       : out    vl_logic;
        beta_t7_8       : out    vl_logic;
        beta_t7_7       : out    vl_logic;
        beta_t7_6       : out    vl_logic;
        beta_t7_5       : out    vl_logic;
        beta_t7_4       : out    vl_logic;
        beta_t7_3       : out    vl_logic;
        beta_t7_2       : out    vl_logic;
        beta_t7_1       : out    vl_logic;
        beta_t7_0       : out    vl_logic;
        new_beta_cal_c  : in     vl_logic;
        G_97_combout    : in     vl_logic
    );
end mod_max4_b_7;