_primary.vhd

来自「上传的是WIMAX系统中」· VHDL 代码 · 共 29 行

library verilog;
use verilog.vl_types.all;
entity stratixii_mac_dynamic_mux is
    port(
        ab              : in     vl_logic_vector(71 downto 0);
        cd              : in     vl_logic_vector(71 downto 0);
        sata            : in     vl_logic;
        satb            : in     vl_logic;
        satc            : in     vl_logic;
        satd            : in     vl_logic;
        multsatab       : in     vl_logic;
        multsatcd       : in     vl_logic;
        outsatab        : in     vl_logic;
        outsatcd        : in     vl_logic;
        multabsaturate  : in     vl_logic;
        multcdsaturate  : in     vl_logic;
        saturateab      : in     vl_logic;
        saturatecd      : in     vl_logic;
        overab          : in     vl_logic;
        overcd          : in     vl_logic;
        sum             : in     vl_logic_vector(71 downto 0);
        m36             : in     vl_logic_vector(71 downto 0);
        bypass          : in     vl_logic_vector(143 downto 0);
        operation       : in     vl_logic_vector(3 downto 0);
        dataout         : out    vl_logic_vector(143 downto 0);
        accoverflow     : out    vl_logic
    );
end stratixii_mac_dynamic_mux;