_primary.vhd

来自「上传的是WIMAX系统中」· VHDL 代码 · 共 15 行

library verilog;
use verilog.vl_types.all;
entity decoder_pll is
    port(
        inclk0          : in     vl_logic;
        pllena          : in     vl_logic;
        areset          : in     vl_logic;
        c0              : out    vl_logic;
        c1              : out    vl_logic;
        c2              : out    vl_logic;
        c3              : out    vl_logic;
        locked          : out    vl_logic
    );
end decoder_pll;