_primary.vhd

上传的是WIMAX系统中

library verilog;
use verilog.vl_types.all;
entity mod_max4_b_1 is
    port(
        r5_10           : out    vl_logic;
        gamma11_c_8     : in     vl_logic;
        gamma11_c_7     : in     vl_logic;
        gamma11_c_6     : in     vl_logic;
        gamma11_c_5     : in     vl_logic;
        gamma11_c_4     : in     vl_logic;
        gamma11_c_3     : in     vl_logic;
        gamma11_c_2     : in     vl_logic;
        gamma11_c_1     : in     vl_logic;
        gamma11_c_0     : in     vl_logic;
        beta0_c_11      : in     vl_logic;
        beta0_c_8       : in     vl_logic;
        beta0_c_9       : in     vl_logic;
        beta0_c_10      : in     vl_logic;
        beta0_c_7       : in     vl_logic;
        beta0_c_6       : in     vl_logic;
        beta0_c_5       : in     vl_logic;
        beta0_c_4       : in     vl_logic;
        beta0_c_3       : in     vl_logic;
        beta0_c_2       : in     vl_logic;
        beta0_c_1       : in     vl_logic;
        beta0_c_0       : in     vl_logic;
        gamma7_c_8      : in     vl_logic;
        gamma7_c_7      : in     vl_logic;
        gamma7_c_6      : in     vl_logic;
        gamma7_c_5      : in     vl_logic;
        gamma7_c_4      : in     vl_logic;
        gamma7_c_3      : in     vl_logic;
        gamma7_c_2      : in     vl_logic;
        gamma7_c_1      : in     vl_logic;
        gamma7_c_0      : in     vl_logic;
        beta3_c_11      : in     vl_logic;
        beta3_c_8       : in     vl_logic;
        beta3_c_9       : in     vl_logic;
        beta3_c_10      : in     vl_logic;
        beta3_c_7       : in     vl_logic;
        beta3_c_6       : in     vl_logic;
        beta3_c_5       : in     vl_logic;
        beta3_c_4       : in     vl_logic;
        beta3_c_3       : in     vl_logic;
        beta3_c_2       : in     vl_logic;
        beta3_c_1       : in     vl_logic;
        beta3_c_0       : in     vl_logic;
        gamma0_c_8      : in     vl_logic;
        gamma0_c_7      : in     vl_logic;
        gamma0_c_6      : in     vl_logic;
        gamma0_c_5      : in     vl_logic;
        gamma0_c_4      : in     vl_logic;
        gamma0_c_3      : in     vl_logic;
        gamma0_c_2      : in     vl_logic;
        gamma0_c_1      : in     vl_logic;
        gamma0_c_0      : in     vl_logic;
        beta4_c_11      : in     vl_logic;
        beta4_c_8       : in     vl_logic;
        beta4_c_9       : in     vl_logic;
        beta4_c_10      : in     vl_logic;
        beta4_c_7       : in     vl_logic;
        beta4_c_6       : in     vl_logic;
        beta4_c_5       : in     vl_logic;
        beta4_c_4       : in     vl_logic;
        beta4_c_3       : in     vl_logic;
        beta4_c_2       : in     vl_logic;
        beta4_c_1       : in     vl_logic;
        beta4_c_0       : in     vl_logic;
        r3_10           : out    vl_logic;
        r1_10           : out    vl_logic;
        r0_10           : out    vl_logic;
        r4_10           : out    vl_logic;
        beta12_11       : in     vl_logic;
        beta12_10       : in     vl_logic;
        beta12_9        : in     vl_logic;
        beta12_8        : in     vl_logic;
        beta12_7        : in     vl_logic;
        beta12_6        : in     vl_logic;
        beta12_5        : in     vl_logic;
        beta12_4        : in     vl_logic;
        beta12_3        : in     vl_logic;
        beta12_2        : in     vl_logic;
        beta12_1        : in     vl_logic;
        beta12_0        : in     vl_logic;
        beta11_11       : in     vl_logic;
        beta11_10       : in     vl_logic;
        beta11_9        : in     vl_logic;
        beta11_8        : in     vl_logic;
        beta11_7        : in     vl_logic;
        beta11_6        : in     vl_logic;
        beta11_5        : in     vl_logic;
        beta11_4        : in     vl_logic;
        beta11_3        : in     vl_logic;
        beta11_2        : in     vl_logic;
        beta11_1        : in     vl_logic;
        beta11_0        : in     vl_logic;
        beta10_11       : in     vl_logic;
        beta10_10       : in     vl_logic;
        beta10_9        : in     vl_logic;
        beta10_8        : in     vl_logic;
        beta10_7        : in     vl_logic;
        beta10_6        : in     vl_logic;
        beta10_5        : in     vl_logic;
        beta10_4        : in     vl_logic;
        beta10_3        : in     vl_logic;
        beta10_2        : in     vl_logic;
        beta10_1        : in     vl_logic;
        beta10_0        : in     vl_logic;
        beta13_11       : in     vl_logic;
        beta13_10       : in     vl_logic;
        beta13_9        : in     vl_logic;
        beta13_8        : in     vl_logic;
        beta13_7        : in     vl_logic;
        beta13_6        : in     vl_logic;
        beta13_5        : in     vl_logic;
        beta13_4        : in     vl_logic;
        beta13_3        : in     vl_logic;
        beta13_2        : in     vl_logic;
        beta13_1        : in     vl_logic;
        beta13_0        : in     vl_logic;
        beta_t1_11      : out    vl_logic;
        beta_t1_10      : out    vl_logic;
        beta_t1_9       : out    vl_logic;
        beta_t1_8       : out    vl_logic;
        beta_t1_7       : out    vl_logic;
        beta_t1_6       : out    vl_logic;
        beta_t1_5       : out    vl_logic;
        beta_t1_4       : out    vl_logic;
        beta_t1_3       : out    vl_logic;
        beta_t1_2       : out    vl_logic;
        beta_t1_1       : out    vl_logic;
        beta_t1_0       : out    vl_logic;
        new_beta_cal_c  : in     vl_logic;
        G_169_combout   : in     vl_logic
    );
end mod_max4_b_1;