_primary.vhd

上传的是WIMAX系统中

library verilog;
use verilog.vl_types.all;
entity mod_max4_b_3 is
    port(
        r5_10           : out    vl_logic;
        gamma9_c_8      : in     vl_logic;
        gamma9_c_7      : in     vl_logic;
        gamma9_c_6      : in     vl_logic;
        gamma9_c_5      : in     vl_logic;
        gamma9_c_4      : in     vl_logic;
        gamma9_c_3      : in     vl_logic;
        gamma9_c_2      : in     vl_logic;
        gamma9_c_1      : in     vl_logic;
        gamma9_c_0      : in     vl_logic;
        beta1_c_11      : in     vl_logic;
        beta1_c_9       : in     vl_logic;
        beta1_c_8       : in     vl_logic;
        beta1_c_10      : in     vl_logic;
        beta1_c_7       : in     vl_logic;
        beta1_c_6       : in     vl_logic;
        beta1_c_5       : in     vl_logic;
        beta1_c_4       : in     vl_logic;
        beta1_c_3       : in     vl_logic;
        beta1_c_2       : in     vl_logic;
        beta1_c_1       : in     vl_logic;
        beta1_c_0       : in     vl_logic;
        gamma5_c_8      : in     vl_logic;
        gamma5_c_7      : in     vl_logic;
        gamma5_c_6      : in     vl_logic;
        gamma5_c_5      : in     vl_logic;
        gamma5_c_4      : in     vl_logic;
        gamma5_c_3      : in     vl_logic;
        gamma5_c_2      : in     vl_logic;
        gamma5_c_1      : in     vl_logic;
        gamma5_c_0      : in     vl_logic;
        beta2_c_11      : in     vl_logic;
        beta2_c_9       : in     vl_logic;
        beta2_c_8       : in     vl_logic;
        beta2_c_10      : in     vl_logic;
        beta2_c_7       : in     vl_logic;
        beta2_c_6       : in     vl_logic;
        beta2_c_5       : in     vl_logic;
        beta2_c_4       : in     vl_logic;
        beta2_c_3       : in     vl_logic;
        beta2_c_2       : in     vl_logic;
        beta2_c_1       : in     vl_logic;
        beta2_c_0       : in     vl_logic;
        gamma2_c_8      : in     vl_logic;
        gamma2_c_7      : in     vl_logic;
        gamma2_c_6      : in     vl_logic;
        gamma2_c_5      : in     vl_logic;
        gamma2_c_4      : in     vl_logic;
        gamma2_c_3      : in     vl_logic;
        gamma2_c_2      : in     vl_logic;
        gamma2_c_1      : in     vl_logic;
        gamma2_c_0      : in     vl_logic;
        beta5_c_11      : in     vl_logic;
        beta5_c_9       : in     vl_logic;
        beta5_c_8       : in     vl_logic;
        beta5_c_10      : in     vl_logic;
        beta5_c_7       : in     vl_logic;
        beta5_c_6       : in     vl_logic;
        beta5_c_5       : in     vl_logic;
        beta5_c_4       : in     vl_logic;
        beta5_c_3       : in     vl_logic;
        beta5_c_2       : in     vl_logic;
        beta5_c_1       : in     vl_logic;
        beta5_c_0       : in     vl_logic;
        r3_10           : out    vl_logic;
        r1_10           : out    vl_logic;
        r0_10           : out    vl_logic;
        r4_10           : out    vl_logic;
        beta32_11       : in     vl_logic;
        beta32_10       : in     vl_logic;
        beta32_9        : in     vl_logic;
        beta32_8        : in     vl_logic;
        beta32_7        : in     vl_logic;
        beta32_6        : in     vl_logic;
        beta32_5        : in     vl_logic;
        beta32_4        : in     vl_logic;
        beta32_3        : in     vl_logic;
        beta32_2        : in     vl_logic;
        beta32_1        : in     vl_logic;
        beta32_0        : in     vl_logic;
        beta31_11       : in     vl_logic;
        beta31_10       : in     vl_logic;
        beta31_9        : in     vl_logic;
        beta31_8        : in     vl_logic;
        beta31_7        : in     vl_logic;
        beta31_6        : in     vl_logic;
        beta31_5        : in     vl_logic;
        beta31_4        : in     vl_logic;
        beta31_3        : in     vl_logic;
        beta31_2        : in     vl_logic;
        beta31_1        : in     vl_logic;
        beta31_0        : in     vl_logic;
        beta30_11       : in     vl_logic;
        beta30_10       : in     vl_logic;
        beta30_9        : in     vl_logic;
        beta30_8        : in     vl_logic;
        beta30_7        : in     vl_logic;
        beta30_6        : in     vl_logic;
        beta30_5        : in     vl_logic;
        beta30_4        : in     vl_logic;
        beta30_3        : in     vl_logic;
        beta30_2        : in     vl_logic;
        beta30_1        : in     vl_logic;
        beta30_0        : in     vl_logic;
        beta33_11       : in     vl_logic;
        beta33_10       : in     vl_logic;
        beta33_9        : in     vl_logic;
        beta33_8        : in     vl_logic;
        beta33_7        : in     vl_logic;
        beta33_6        : in     vl_logic;
        beta33_5        : in     vl_logic;
        beta33_4        : in     vl_logic;
        beta33_3        : in     vl_logic;
        beta33_2        : in     vl_logic;
        beta33_1        : in     vl_logic;
        beta33_0        : in     vl_logic;
        beta_t3_11      : out    vl_logic;
        beta_t3_10      : out    vl_logic;
        beta_t3_9       : out    vl_logic;
        beta_t3_8       : out    vl_logic;
        beta_t3_7       : out    vl_logic;
        beta_t3_6       : out    vl_logic;
        beta_t3_5       : out    vl_logic;
        beta_t3_4       : out    vl_logic;
        beta_t3_3       : out    vl_logic;
        beta_t3_2       : out    vl_logic;
        beta_t3_1       : out    vl_logic;
        beta_t3_0       : out    vl_logic;
        new_beta_cal_c  : in     vl_logic;
        G_145_combout   : in     vl_logic
    );
end mod_max4_b_3;