_primary.vhd

来自「上传的是WIMAX系统中」· VHDL 代码 · 共 13 行

library verilog;
use verilog.vl_types.all;
entity tri_bus is
    generic(
        width_datain    : integer := 1;
        width_dataout   : integer := 1
    );
    port(
        datain          : in     vl_logic_vector;
        dataout         : out    vl_logic_vector
    );
end tri_bus;