_primary.vhd

来自「上传的是WIMAX系统中」· VHDL 代码 · 共 11 行

library verilog;
use verilog.vl_types.all;
entity mux21 is
    port(
        dataa           : in     vl_logic;
        datab           : in     vl_logic;
        dataout         : out    vl_logic;
        outputselect    : in     vl_logic
    );
end mux21;