📄 lowpassfiltervhdlcord.txt
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SIGNAL add_temp_12 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_13 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_12 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_13 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 8 Signals
SIGNAL a1sum8 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum8 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum8 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum8 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert8 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert8 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section8 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul8 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul8 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul8 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul8 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul8 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert8 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_14 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_15 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_14 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_15 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 9 Signals
SIGNAL a1sum9 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum9 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum9 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum9 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert9 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert9 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section9 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul9 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul9 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul9 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul9 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul9 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert9 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_16 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_17 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_16 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_17 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 10 Signals
SIGNAL a1sum10 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum10 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum10 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum10 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert10 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert10 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section10 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul10 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul10 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul10 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul10 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul10 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert10 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_18 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_19 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_18 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_19 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 11 Signals
SIGNAL a1sum11 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum11 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum11 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum11 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert11 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert11 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section11 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul11 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul11 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul11 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul11 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul11 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert11 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_20 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_21 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_20 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_21 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 12 Signals
SIGNAL a1sum12 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum12 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum12 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum12 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert12 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert12 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section12 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul12 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul12 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul12 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul12 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul12 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert12 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_22 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_23 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_22 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_23 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 13 Signals
SIGNAL a1sum13 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum13 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum13 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum13 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert13 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert13 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section13 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul13 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul13 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul13 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul13 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul13 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert13 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_24 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_25 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_24 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_25 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 14 Signals
SIGNAL a1sum14 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum14 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum14 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum14 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert14 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert14 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section14 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul14 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul14 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul14 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul14 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul14 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert14 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_26 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_27 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_26 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_27 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 15 Signals
SIGNAL a1sum15 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum15 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum15 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum15 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert15 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert15 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section15 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul15 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul15 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul15 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul15 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul15 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert15 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_28 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_29 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_28 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_29 : signed(38 DOWNTO 0); -- sfix39_En29
-- Section 16 Signals
SIGNAL a1sum16 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL a2sum16 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b1sum16 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL b2sum16 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL numtypeconvert16 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dentypeconvert16 : signed(19 DOWNTO 0); -- sfix20_En15
SIGNAL dendelay_section16 : dendelay_pipeline_type(0 TO 1); -- sfix20_En15
SIGNAL a2mul16 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL a3mul16 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1mul16 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b2mul16 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b3mul16 : signed(35 DOWNTO 0); -- sfix36_En29
SIGNAL b1multypeconvert16 : signed(19 DOWNTO 0); -- sfix20_En11
SIGNAL add_temp_30 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL add_temp_31 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_30 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL sub_temp_31 : signed(38 DOWNTO 0); -- sfix39_En29
SIGNAL output_typeconvert : signed(11 DOWNTO 0); -- sfix12_En7
SIGNAL output_register : signed(11 DOWNTO 0); -- sfix12_En7
BEGIN
-- Block Statements
input_reg_process : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
input_register <= (OTHERS => '0');
ELSIF clk'event AND clk = '1' THEN
IF clk_enable = '1' THEN
input_register <= signed(filter_in);
END IF;
END IF;
END PROCESS input_reg_process;
-- ------------------ Section 1 ------------------
numtypeconvert1 <= resize( input_register(11 DOWNTO 0) & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0', 20);
dentypeconvert1 <= resize( a1sum1(15 DOWNTO 0) & '0' & '0' & '0' & '0', 20);
numdelay_process_section1 : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
numdelay_section1(0 TO 1) <= (OTHERS => (OTHERS => '0'));
ELSIF clk'event AND clk = '1' THEN
IF clk_enable = '1' THEN
numdelay_section1(0) <= numtypeconvert1;
numdelay_section1(1) <= numdelay_section1(0);
END IF;
END IF;
END PROCESS numdelay_process_section1;
dendelay_process_section1 : PROCESS (clk, reset)
BEGIN
IF reset = '1' THEN
dendelay_section1(0 TO 1) <= (OTHERS => (OTHERS => '0'));
ELSIF clk'event AND clk = '1' THEN
IF clk_enable = '1' THEN
dendelay_section1(0) <= dentypeconvert1;
dendelay_section1(1) <= dendelay_section1(0);
END IF;
END IF;
END PROCESS dendelay_process_section1;
a2mul1 <= dendelay_section1(0) * coeff_a2_section1;
a3mul1 <= dendelay_section1(1) * coeff_a3_section1;
b1mul1 <= numtypeconvert1 * coeff_b1_section1;
b2mul1 <= numdelay_section1(0) * coeff_b2_section1;
b3mul1 <= numdelay_section1(1) * coeff_b3_section1;
b1multypeconvert1 <= resize( shift_right( (b1mul1(35) & b1mul1(35 DOWNTO 17) + 1), 1), 20);
add_temp <= resize(b1multypeconvert1 & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0' & '0', 39) + resize(b2mul1, 39);
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