addr_gen.fit.qmsg

用vhdl语言实现的中值滤波,硬件需要DE2板

{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "16 unused 3.30 0 16 0 " "Info: Number of I/O pins in group: 16 (unused VREF, 3.30 VCCIO, 0 input, 16 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 3 11 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 3 total pin(s) used --  11 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 17 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  17 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use unused 1 16 " "Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 1 total pin(s) used --  16 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 0 17 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  17 pins available" {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "0 " "Info: Fitter placement preparation operations ending: elapsed time = 0 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "5.332 ns register register " "Info: Estimated most critical path is register to register delay of 5.332 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns addr_count\[4\] 1 REG LAB_X20_Y10 9 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X20_Y10; Fanout = 9; REG Node = 'addr_count\[4\]'" {  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "" { addr_count[4] } "NODE_NAME" } "" } } { "addr_gen.v" "" { Text "G:/laurie/addr_gen/addr_gen/addr_gen.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.124 ns) + CELL(0.443 ns) 1.567 ns add~756COUTCOUT1_772 2 COMB LAB_X18_Y11 2 " "Info: 2: + IC(1.124 ns) + CELL(0.443 ns) = 1.567 ns; Loc. = LAB_X18_Y11; Fanout = 2; COMB Node = 'add~756COUTCOUT1_772'" {  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "1.567 ns" { addr_count[4] add~756COUTCOUT1_772 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.062 ns) 1.629 ns add~757COUTCOUT1_773 3 COMB LAB_X18_Y11 2 " "Info: 3: + IC(0.000 ns) + CELL(0.062 ns) = 1.629 ns; Loc. = LAB_X18_Y11; Fanout = 2; COMB Node = 'add~757COUTCOUT1_773'" {  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "0.062 ns" { add~756COUTCOUT1_772 add~757COUTCOUT1_773 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.468 ns) 2.097 ns add~758 4 COMB LAB_X18_Y11 1 " "Info: 4: + IC(0.000 ns) + CELL(0.468 ns) = 2.097 ns; Loc. = LAB_X18_Y11; Fanout = 1; COMB Node = 'add~758'" {  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "0.468 ns" { add~757COUTCOUT1_773 add~758 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.677 ns) + CELL(0.340 ns) 3.114 ns addr_count\[6\]~264 5 COMB LAB_X18_Y12 1 " "Info: 5: + IC(0.677 ns) + CELL(0.340 ns) = 3.114 ns; Loc. = LAB_X18_Y12; Fanout = 1; COMB Node = 'addr_count\[6\]~264'" {  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "1.017 ns" { add~758 addr_count[6]~264 } "NODE_NAME" } "" } } { "addr_gen.v" "" { Text "G:/laurie/addr_gen/addr_gen/addr_gen.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.818 ns) + CELL(0.225 ns) 4.157 ns addr_count\[6\]~265 6 COMB LAB_X18_Y9 1 " "Info: 6: + IC(0.818 ns) + CELL(0.225 ns) = 4.157 ns; Loc. = LAB_X18_Y9; Fanout = 1; COMB Node = 'addr_count\[6\]~265'" {  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "1.043 ns" { addr_count[6]~264 addr_count[6]~265 } "NODE_NAME" } "" } } { "addr_gen.v" "" { Text "G:/laurie/addr_gen/addr_gen/addr_gen.v" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.807 ns) + CELL(0.368 ns) 5.332 ns addr_count\[6\] 7 REG LAB_X18_Y11 8 " "Info: 7: + IC(0.807 ns) + CELL(0.368 ns) = 5.332 ns; Loc. = LAB_X18_Y11; Fanout = 8; REG Node = 'addr_count\[6\]'" {  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "1.175 ns" { addr_count[6]~265 addr_count[6] } "NODE_NAME" } "" } } { "addr_gen.v" "" { Text "G:/laurie/addr_gen/addr_gen/addr_gen.v" 42 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.906 ns 35.75 % " "Info: Total cell delay = 1.906 ns ( 35.75 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.426 ns 64.25 % " "Info: Total interconnect delay = 3.426 ns ( 64.25 % )" {  } {  } 0}  } { { "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" "" { Report "G:/laurie/addr_gen/addr_gen/db/addr_gen_cmp.qrpt" Compiler "addr_gen" "UNKNOWN" "V1" "G:/laurie/addr_gen/addr_gen/db/addr_gen.quartus_db" { Floorplan "G:/laurie/addr_gen/addr_gen/" "" "5.332 ns" { addr_count[4] add~756COUTCOUT1_772 add~757COUTCOUT1_773 add~758 addr_count[6]~264 addr_count[6]~265 addr_count[6] } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PLACER_ESTIMATED_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Info: Estimated interconnect usage is 1% of the available device resources" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "1 " "Info: Fitter placement operations ending: elapsed time = 1 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "0 " "Info: Fitter routing operations ending: elapsed time = 0 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 04 20:05:36 2005 " "Info: Processing ended: Mon Apr 04 20:05:36 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0}  } {  } 0}