fre_word_gen.vhd

用DE2板子实现的正选信号发生器,需安装quartus2软件,硬件需要DE2的开发板

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;

entity f_word_gen is
port(clk,reset:in std_logic;
     fre_word:out std_logic_vector(31 downto 0));
end f_word_gen;

architecture rtl of f_word_gen is
signal s_fre_word:integer range 0 to 2**32;
begin

process(clk)
begin
  if(clk'event and clk='1')then 
  	if(reset='1')then
		s_fre_word<=42949;
	else 
		s_fre_word<=s_fre_word+4294;
	end if;
   end if;
fre_word<=conv_std_logic_vector(s_fre_word,32);
end process;

end rtl;