div1000.vhd

用DE2板子实现的正选信号发生器,需安装quartus2软件,硬件需要DE2的开发板

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;

entity div1000 is
port(clk1M:in std_logic;
     clk1k:out std_logic);
end div1000;

architecture rtl of div1000 is
signal data:integer range 0 to 999;
--signal q:std_logic;
begin

process(clk1M)
begin
    if(clk1M'event and clk1M='1')then
        if(data=999)then
           data<=0;
     	   clk1k<='1';
        else 
           data<=data+1;
           clk1k<='0';
        end if;
   end if;

end process;
end rtl;