altsyncram_f771.tdf

来自「用DE2板子实现的正选信号发生器,需安装quartus2软件,硬件需要DE2的开」· TDF 代码 · 共 452 行 · 第 1/2 页

TDF
452 行
字号
12
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 9,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a10 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 10,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a11 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 11,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a12 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 12,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a13 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 13,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a14 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 14,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a15 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 15,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a16 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 16,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a17 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 17,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a18 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 18,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	ram_block1a19 : cycloneii_ram_block
		WITH (
			CONNECTIVITY_CHECKING = "OFF",
			INIT_FILE = "fm_sin.mif",
			INIT_FILE_LAYOUT = "port_a",
			LOGICAL_RAM_NAME = "ALTSYNCRAM",
			OPERATION_MODE = "rom",
			PORT_A_ADDRESS_WIDTH = 10,
			PORT_A_DATA_OUT_CLEAR = "none",
			PORT_A_DATA_OUT_CLOCK = "clock0",
			PORT_A_DATA_WIDTH = 1,
			PORT_A_DISABLE_CE_ON_INPUT_REGISTERS = "on",
			PORT_A_DISABLE_CE_ON_OUTPUT_REGISTERS = "on",
			PORT_A_FIRST_ADDRESS = 0,
			PORT_A_FIRST_BIT_NUMBER = 19,
			PORT_A_LAST_ADDRESS = 1023,
			PORT_A_LOGICAL_RAM_DEPTH = 1024,
			PORT_A_LOGICAL_RAM_WIDTH = 20,
			RAM_BLOCK_TYPE = "auto"
		);
	address_a_wire[9..0]	: WIRE;

BEGIN 
	ram_block1a[19..0].clk0 = clock0;
	ram_block1a[19..0].portaaddr[] = ( address_a_wire[9..0]);
	address_a_wire[] = address_a[];
	q_a[] = ( ram_block1a[19..0].portadataout[0..0]);
END;
--VALID FILE
12

altsyncram_f771.tdf - 源码说明

本页面展示了「用DE2板子实现的正选信号发生器,需安装quartus2软件,硬件需要DE2的开发板」中的 altsyncram_f771.tdf 源码文件，采用 TDF 编程语言编写，共 452 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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