sin_gen.qsf

用DE2板子实现的正选信号发生器,需安装quartus2软件,硬件需要DE2的开发板

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		sin_gen_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C35F672C6
set_global_assignment -name TOP_LEVEL_ENTITY sin_gen
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:22:04  SEPTEMBER 17, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 6.0
set_global_assignment -name USER_LIBRARIES "D:/altera/megacore/nco-v2.3.1/lib;C:/altera/megacore/nco-v2.3.1/lib;"
set_global_assignment -name VECTOR_INPUT_SOURCE "F:\\sine_generate\\m_signal.vwf"
set_global_assignment -name ENABLE_SIGNALTAP ON
set_global_assignment -name USE_SIGNALTAP_FILE stp_final.stp
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name AUTO_ENABLE_SMART_COMPILE OFF
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name VERILOG_FILE NCO_sin_st.v
set_global_assignment -name VHDL_FILE NCO_sin.vhd
set_global_assignment -name VHDL_FILE cnt1000.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE cnt1000.vwf
set_global_assignment -name VHDL_FILE cnt100.vhd
set_global_assignment -name VHDL_FILE am_adj.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE am_adj.vwf
set_global_assignment -name VHDL_FILE div1000.vhd
set_global_assignment -name VHDL_FILE div40.vhd
set_global_assignment -name VHDL_FILE am_adjust.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE am_adjust.vwf
set_global_assignment -name BDF_FILE multi_clk.bdf
set_global_assignment -name VHDL_FILE const1M.vhd
set_global_assignment -name MIF_FILE fm_sin.mif
set_global_assignment -name CDF_FILE Chain1.cdf
set_global_assignment -name BDF_FILE sin_gen.bdf
set_global_assignment -name VHDL_FILE key_delay.vhd
set_global_assignment -name VHDL_FILE cnt99.vhd
set_global_assignment -name BDF_FILE fre_word_gen.bdf
set_global_assignment -name BDF_FILE am_modu_s.bdf
set_global_assignment -name MIF_FILE apsk.mif
set_global_assignment -name BDF_FILE a_psk.bdf
set_global_assignment -name VHDL_FILE m_signal.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE m_signal.vwf
set_global_assignment -name VHDL_FILE ask_m.vhd
set_global_assignment -name VHDL_FILE psk_m.vhd
set_global_assignment -name VHDL_FILE afm_apsk_mux.vhd
set_global_assignment -name VERILOG_FILE "F:/my_study/sine_generate/dds_st.v"
set_global_assignment -name VHDL_FILE "F:/my_study/sine_generate/dds.vhd"
set_location_assignment PIN_N2 -to clk50m
set_location_assignment PIN_G26 -to key_100
set_location_assignment PIN_N23 -to key_100k
set_global_assignment -name SIGNALTAP_FILE stp1.stp
set_global_assignment -name VHDL_FILE padd0.vhd
set_global_assignment -name BDF_FILE test_am.bdf
set_global_assignment -name SIGNALTAP_FILE stp2.stp
set_global_assignment -name VHDL_FILE cnt10.vhd
set_global_assignment -name VERILOG_FILE "F:/debug/fm/dds_st.v"
set_global_assignment -name VHDL_FILE "F:/debug/fm/dds.vhd"
set_global_assignment -name VERILOG_FILE "F:/debug/fm/NCO_DDS_st.v"
set_global_assignment -name VHDL_FILE "F:/debug/fm/NCO_DDS.vhd"
set_global_assignment -name SIGNALTAP_FILE stp_fm.stp
set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=536899072" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=4096" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_MEM_ADDRESS_BITS=12" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
set_global_assignment -name VHDL_FILE const100k.vhd
set_location_assignment PIN_P23 -to am_adj
set_global_assignment -name SIGNALTAP_FILE stp_am.stp
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "multi_clk:inst2|clk1m" -section_id auto_signaltap_0
set_global_assignment -name BDF_FILE am_modulate.bdf
set_global_assignment -name BDF_FILE fm_modulate.bdf
set_location_assignment PIN_N25 -to sw0
set_location_assignment PIN_N26 -to sw1
set_global_assignment -name SIGNALTAP_FILE stp_final.stp
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to q_out[0] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to q_out[0] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to q_out[1] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to q_out[2] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to q_out[3] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to q_out[4] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to q_out[5] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to q_out[6] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to q_out[7] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to q_out[1] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to q_out[2] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to q_out[3] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to q_out[4] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to q_out[5] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to q_out[6] -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to q_out[7] -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=8" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=8" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=45" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=55603" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=2383" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BIT_CNTR_BITS=3" -section_id auto_signaltap_0