ctr.map.eqn

用cpld控制时序通过usb传送数据到pc机的vhdl源码

-- Copyright (C) 1991-2005 Altera Corporation
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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--A1L75 is reduce_nor~355
A1L75_p1_out = !pa_in[1] & pa3 & !pa_in[0];
A1L75_or_out = A1L75_p1_out;
A1L75 = !(A1L75_or_out);


--A1L61 is busy~2
A1L61_or_out = busy;
A1L61 = A1L61_or_out;


--A1L85 is reduce_nor~358
A1L85_p1_out = !pa_in[1] & !pa3 & pa_in[0];
A1L85_or_out = A1L85_p1_out;
A1L85 = A1L85_or_out;


--A1L95 is reduce_nor~360
A1L95_p1_out = pa_in[1] & !pa3 & pa_in[0];
A1L95_or_out = A1L95_p1_out;
A1L95 = !(A1L95_or_out);


--q[0] is q[0]
q[0]_reg_input = VCC;
q[0]_p3_out = empty & Uflag[1];
q[0] = TFFE(q[0]_reg_input, GLOBAL(clk), , , q[0]_p3_out);


--A1L24Q is led1~reg0
A1L24Q_p1_out = pa_in[1] & !pa3 & !pa_in[0];
A1L24Q_or_out = A1L24Q_p1_out;
A1L24Q_reg_input = !(A1L24Q_or_out);
A1L24Q = DFFE(A1L24Q_reg_input, GLOBAL(clk), , reset, );


--counter64[0] is counter64[0]
counter64[0]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[0];
counter64[0]_or_out = counter64[0]_p1_out;
counter64[0]_reg_input = counter64[0]_or_out;
counter64[0] = DFFE(counter64[0]_reg_input, GLOBAL(clk), , , reset);


--counter64[7] is counter64[7]
counter64[7]_p0_out = counter64[7] & pa_in[0];
counter64[7]_p1_out = counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[2] & counter64[0] & counter64[1] & counter64[7];
counter64[7]_p2_out = counter64[7] & !pa_in[1];
counter64[7]_p4_out = counter64[7] & pa3;
counter64[7]_or_out = counter64[7]_p0_out # counter64[7]_p1_out # counter64[7]_p2_out # counter64[7]_p4_out;
counter64[7]_reg_input = counter64[7]_or_out;
counter64[7] = TFFE(counter64[7]_reg_input, GLOBAL(clk), , , reset);


--A1L83Q is fiford~reg0
A1L83Q_p1_out = !q[0] & empty & Uflag[1];
A1L83Q_or_out = A1L83Q_p1_out;
A1L83Q_reg_input = !(A1L83Q_or_out);
A1L83Q = DFFE(A1L83Q_reg_input, GLOBAL(clk), , , );


--A1L73 is fiford~14
A1L73_or_out = A1L83Q;
A1L73 = A1L73_or_out;


--counter16[0] is counter16[0]
counter16[0]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & reset & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1];
counter16[0]_p2_out = !pa_in[1] & reset & counter16[0];
counter16[0]_p3_out = pa3 & reset & counter16[0];
counter16[0]_p4_out = pa_in[0] & reset & counter16[0];
counter16[0]_or_out = counter16[0]_p1_out # counter16[0]_p2_out # counter16[0]_p3_out # counter16[0]_p4_out;
counter16[0]_reg_input = counter16[0]_or_out;
counter16[0] = TFFE(counter16[0]_reg_input, GLOBAL(clk), , , );


--counter64[1] is counter64[1]
counter64[1]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[0] & !counter64[1];
counter64[1]_p2_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[0] & counter64[1];
counter64[1]_or_out = counter64[1]_p1_out # counter64[1]_p2_out;
counter64[1]_reg_input = counter64[1]_or_out;
counter64[1] = DFFE(counter64[1]_reg_input, GLOBAL(clk), , , reset);


--counter16[1] is counter16[1]
counter16[1]_p1_out = counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[1]_p2_out = !pa_in[1] & reset & counter16[1];
counter16[1]_p3_out = pa3 & reset & counter16[1];
counter16[1]_p4_out = pa_in[0] & reset & counter16[1];
counter16[1]_or_out = counter16[1]_p1_out # counter16[1]_p2_out # counter16[1]_p3_out # counter16[1]_p4_out;
counter16[1]_reg_input = counter16[1]_or_out;
counter16[1] = TFFE(counter16[1]_reg_input, GLOBAL(clk), , , );


--counter64[2] is counter64[2]
counter64[2]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[2] & !counter64[0];
counter64[2]_p2_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[2] & !counter64[1];
counter64[2]_p4_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[2] & counter64[0] & counter64[1];
counter64[2]_or_out = counter64[2]_p1_out # counter64[2]_p2_out # counter64[2]_p4_out;
counter64[2]_reg_input = counter64[2]_or_out;
counter64[2] = DFFE(counter64[2]_reg_input, GLOBAL(clk), , , reset);


--counter16[2] is counter16[2]
counter16[2]_p1_out = counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[2]_p2_out = !pa_in[1] & reset & counter16[2];
counter16[2]_p3_out = pa3 & reset & counter16[2];
counter16[2]_p4_out = pa_in[0] & reset & counter16[2];
counter16[2]_or_out = counter16[2]_p1_out # counter16[2]_p2_out # counter16[2]_p3_out # counter16[2]_p4_out;
counter16[2]_reg_input = counter16[2]_or_out;
counter16[2] = TFFE(counter16[2]_reg_input, GLOBAL(clk), , , );


--counter64[3] is counter64[3]
counter64[3]_p0_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[3]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & !counter64[2];
counter64[3]_p2_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & !counter64[0];
counter64[3]_p4_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & !counter64[1];
counter64[3]_or_out = counter64[3]_p0_out # counter64[3]_p1_out # counter64[3]_p2_out # counter64[3]_p4_out;
counter64[3]_reg_input = counter64[3]_or_out;
counter64[3] = DFFE(counter64[3]_reg_input, GLOBAL(clk), , , reset);


--counter16[3] is counter16[3]
counter16[3]_p1_out = counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[3]_p2_out = !pa_in[1] & reset & counter16[3];
counter16[3]_p3_out = pa3 & reset & counter16[3];
counter16[3]_p4_out = pa_in[0] & reset & counter16[3];
counter16[3]_or_out = counter16[3]_p1_out # counter16[3]_p2_out # counter16[3]_p3_out # counter16[3]_p4_out;
counter16[3]_reg_input = counter16[3]_or_out;
counter16[3] = TFFE(counter16[3]_reg_input, GLOBAL(clk), , , );


--counter64[4] is counter64[4]
counter64[4]_p0_out = pa_in[0] & counter64[4];
counter64[4]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[4]_p2_out = !pa_in[1] & counter64[4];
counter64[4]_p4_out = pa3 & counter64[4];
counter64[4]_or_out = counter64[4]_p0_out # counter64[4]_p1_out # counter64[4]_p2_out # counter64[4]_p4_out;
counter64[4]_reg_input = counter64[4]_or_out;
counter64[4] = TFFE(counter64[4]_reg_input, GLOBAL(clk), , , reset);


--counter64[5] is counter64[5]
counter64[5]_p0_out = pa_in[0] & counter64[5];
counter64[5]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[4] & counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[5]_p2_out = !pa_in[1] & counter64[5];
counter64[5]_p4_out = pa3 & counter64[5];
counter64[5]_or_out = counter64[5]_p0_out # counter64[5]_p1_out # counter64[5]_p2_out # counter64[5]_p4_out;
counter64[5]_reg_input = counter64[5]_or_out;
counter64[5] = TFFE(counter64[5]_reg_input, GLOBAL(clk), , , reset);


--counter16[4] is counter16[4]
counter16[4]_p0_out = pa_in[0] & reset & counter16[4];
counter16[4]_p1_out = counter16[5] & counter16[3] & counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[4]_p2_out = counter16[3] & counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & reset & counter16[4];
counter16[4]_p3_out = !pa_in[1] & reset & counter16[4];
counter16[4]_p4_out = pa3 & reset & counter16[4];
counter16[4]_or_out = counter16[4]_p0_out # counter16[4]_p1_out # counter16[4]_p2_out # counter16[4]_p3_out # counter16[4]_p4_out;
counter16[4]_reg_input = counter16[4]_or_out;
counter16[4] = TFFE(counter16[4]_reg_input, GLOBAL(clk), , , );


--counter64[6] is counter64[6]
counter64[6]_p0_out = pa_in[0] & counter64[6];
counter64[6]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[5] & counter64[4] & counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[6]_p2_out = !pa_in[1] & counter64[6];
counter64[6]_p4_out = pa3 & counter64[6];
counter64[6]_or_out = counter64[6]_p0_out # counter64[6]_p1_out # counter64[6]_p2_out # counter64[6]_p4_out;
counter64[6]_reg_input = counter64[6]_or_out;
counter64[6] = TFFE(counter64[6]_reg_input, GLOBAL(clk), , , reset);


--counter16[5] is counter16[5]
counter16[5]_p1_out = counter16[4] & counter16[3] & counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[5]_p2_out = !pa_in[1] & reset & counter16[5];
counter16[5]_p3_out = pa3 & reset & counter16[5];
counter16[5]_p4_out = pa_in[0] & reset & counter16[5];
counter16[5]_or_out = counter16[5]_p1_out # counter16[5]_p2_out # counter16[5]_p3_out # counter16[5]_p4_out;
counter16[5]_reg_input = counter16[5]_or_out;
counter16[5] = TFFE(counter16[5]_reg_input, GLOBAL(clk), , , );


--A1L65Q is r_c~reg0
A1L65Q_p1_out = pa_in[1] & !pa3 & !pa_in[0] & !A1L65Q & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[0] & counter64[2] & counter64[1];
A1L65Q_p2_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[0] & counter64[2] & counter64[1] & !counter64[3];
A1L65Q_or_out = A1L65Q_p1_out # A1L65Q_p2_out;
A1L65Q_reg_input = !(A1L65Q_or_out);
A1L65Q = DFFE(A1L65Q_reg_input, GLOBAL(clk), , reset, );


--A1L3Q is addr[0]~reg0
A1L3Q_p0_out = A1L3Q & pa_in[0];
A1L3Q_p1_out = !counter16[2] & !counter16[0] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & A1L3Q;
A1L3Q_p3_out = A1L3Q & !pa_in[1];
A1L3Q_p4_out = A1L3Q & pa3;
A1L3Q_or_out = A1L26 # A1L3Q_p0_out # A1L3Q_p1_out # A1L3Q_p3_out # A1L3Q_p4_out;
A1L3Q_reg_input = A1L3Q_or_out;
A1L3Q = TFFE(A1L3Q_reg_input, GLOBAL(clk), reset, , );


--A1L01 is addr~1736
A1L01 = EXP(!counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & !counter16[5] & !counter16[4]);


--A1L11 is addr~1737
A1L11 = EXP(!counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[1] & !counter16[0] & counter16[2] & !counter16[5] & !counter16[4]);


--A1L21 is addr~1738
A1L21 = EXP(!counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[0] & counter16[2] & !counter16[3] & !counter16[5] & !counter16[4]);


--A1L9Q is addr[3]~reg0
A1L9Q_p1_out = A1L11 & A1L21;
A1L9Q_p0_out = A1L11 & A1L21 & pa_in[1] & !pa3 & !pa_in[0] & A1L01 & !A1L9Q;
A1L9Q_p2_out = A1L11 & A1L21 & !counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & !counter16[1] & !counter16[2] & counter16[3] & !counter16[5] & !counter16[4];
A1L9Q_p3_out = A1L11 & A1L21 & !counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[3] & !counter16[5] & !counter16[4] & !counter16[0];
A1L9Q_or_out = A1L9Q_p0_out # A1L9Q_p2_out # A1L9Q_p3_out;
A1L9Q_reg_input = A1L9Q_p1_out $ A1L9Q_or_out;
A1L9Q = DFFE(A1L9Q_reg_input, GLOBAL(clk), , reset, );


--A1L31 is addr~1747
A1L31 = EXP(counter16[1] & counter16[0]);


--A1L41 is addr~1748
A1L41 = EXP(pa_in[1] & !pa3 & !pa_in[0]);


--A1L7Q is addr[2]~reg0
A1L7Q_p1_out = !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[1] & counter16[2] & counter16[3] & !counter16[5] & !counter16[4];