ctr.fit.eqn

用cpld控制时序通过usb传送数据到pc机的vhdl源码

--A1L7Q is addr[1]~reg0 at LC60
A1L7Q_p0_out = !counter16[1] & counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & pa_in[1] & !pa3 & !pa_in[0] & counter64[1] & A1L7Q;
A1L7Q_p1_out = !counter16[2] & !counter16[0] & counter16[1] & !counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & pa_in[1] & !pa3 & !pa_in[0] & counter64[1] & A1L7Q;
A1L7Q_p2_out = counter16[0] & !counter16[1] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & pa_in[1] & !pa3 & !pa_in[0] & counter64[1] & A1L7Q;
A1L7Q_p3_out = !counter16[2] & counter16[0] & counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & pa_in[1] & !pa3 & !pa_in[0] & counter64[1] & A1L7Q;
A1L7Q_or_out = A1L66 # A1L7Q_p0_out # A1L7Q_p1_out # A1L7Q_p2_out # A1L7Q_p3_out;
A1L7Q_reg_input = A1L7Q_or_out;
A1L7Q = TFFE(A1L7Q_reg_input, GLOBAL(clk), , reset, );


--A1L46 is rtl~842 at LC54
A1L46_p0_out = !counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & A1L4Q & !counter16[0];
A1L46_p1_out = counter16[1] & counter16[3] & counter16[2] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & !A1L4Q;
A1L46_p2_out = !counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & !A1L4Q & counter16[0];
A1L46_p3_out = !counter16[2] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & !A1L4Q & counter16[0];
A1L46_p4_out = !counter16[1] & counter16[3] & counter16[2] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & A1L4Q;
A1L46 = A1L46_p0_out # A1L46_p1_out # A1L46_p2_out # A1L46_p3_out # A1L46_p4_out;


--A1L56 is rtl~848 at LC58
A1L56_p1_out = !pa_in[1] & !A1L7Q;
A1L56_p2_out = !A1L7Q & pa3;
A1L56 = A1L56_p1_out # A1L56_p2_out;


--A1L66 is rtl~851 at LC59
A1L66_p0_out = !A1L7Q & counter16[0] & counter16[1] & !counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1];
A1L66_p1_out = pa_in[0] & !A1L7Q;
A1L66_p2_out = !A1L7Q & !counter16[0] & !counter16[1] & !counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1];
A1L66_p3_out = !A1L7Q & counter16[1] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[2];
A1L66_p4_out = !A1L7Q & !counter16[0] & counter16[1] & counter16[3] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1];
A1L66 = A1L56 # A1L66_p0_out # A1L66_p1_out # A1L66_p2_out # A1L66_p3_out # A1L66_p4_out;


--~GND~0 is ~GND~0 at LC64
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--~VCC~0 is ~VCC~0 at LC1
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--~GND~1 is ~GND~1 at LC25
~GND~1_or_out = GND;
~GND~1 = ~GND~1_or_out;


--~VCC~1 is ~VCC~1 at LC24
~VCC~1_or_out = GND;
~VCC~1 = !(~VCC~1_or_out);


--~VCC~2 is ~VCC~2 at LC21
~VCC~2_or_out = GND;
~VCC~2 = !(~VCC~2_or_out);


--~GND~2 is ~GND~2 at LC17
~GND~2_or_out = GND;
~GND~2 = ~GND~2_or_out;


--reset is reset at PIN_18
--operation mode is input

reset = INPUT();


--clk is clk at PIN_37
--operation mode is input

clk = INPUT();


--ifclk is ifclk at PIN_42
--operation mode is input

ifclk = INPUT();


--empty is empty at PIN_19
--operation mode is input

empty = INPUT();


--busy is busy at PIN_23
--operation mode is input

busy = INPUT();


--pa3 is pa3 at PIN_8
--operation mode is input

pa3 = INPUT();


--pa_in[0] is pa_in[0] at PIN_3
--operation mode is input

pa_in[0] = INPUT();


--pa_in[1] is pa_in[1] at PIN_5
--operation mode is input

pa_in[1] = INPUT();


--Uflag[0] is Uflag[0] at PIN_43
--operation mode is input

Uflag[0] = INPUT();


--Uflag[1] is Uflag[1] at PIN_44
--operation mode is input

Uflag[1] = INPUT();


--Uflag[2] is Uflag[2] at PIN_2
--operation mode is input

Uflag[2] = INPUT();


--slrd is slrd at PIN_35
--operation mode is output

slrd = OUTPUT(~GND~0);


--pa2 is pa2 at PIN_6
--operation mode is output

pa2 = OUTPUT(~VCC~0);


--pa4 is pa4 at PIN_10
--operation mode is output

pa4 = OUTPUT(~GND~1);


--pa5 is pa5 at PIN_11
--operation mode is output

pa5 = OUTPUT(~VCC~1);


--pa6 is pa6 at PIN_12
--operation mode is output

pa6 = OUTPUT(~VCC~2);


--pa7 is pa7 at PIN_15
--operation mode is output

pa7 = OUTPUT(~GND~2);


--fifowr is fifowr at PIN_14
--operation mode is output

fifowr = OUTPUT(A1L81);


--rstfifo is rstfifo at PIN_20
--operation mode is output

rstfifo = OUTPUT(A1L95);


--led1 is led1 at PIN_21
--operation mode is output

led1 = OUTPUT(A1L44Q);


--led2 is led2 at PIN_22
--operation mode is output

led2 = OUTPUT(A1L16);


--ctr is ctr at PIN_25
--operation mode is output

ctr = OUTPUT(A1L06);


--fiford is fiford at PIN_13
--operation mode is output

fiford = OUTPUT(A1L04Q);


--slwr is slwr at PIN_34
--operation mode is output

slwr = OUTPUT(A1L93);


--r_c is r_c at PIN_33
--operation mode is output

r_c = OUTPUT(A1L85Q);


--addr[0] is addr[0] at PIN_30
--operation mode is output

addr[0] = OUTPUT(A1L3);


--addr[2] is addr[2] at PIN_27
--operation mode is output

addr[2] = OUTPUT(A1L9Q);


--addr[3] is addr[3] at PIN_31
--operation mode is output

addr[3] = OUTPUT(A1L11Q);


--addr[1] is addr[1] at PIN_28
--operation mode is output

addr[1] = OUTPUT(A1L6);






--A1L3 is addr[0]~1755 at LC52
A1L3_or_out = A1L4Q;
A1L3 = A1L3_or_out;


--A1L6 is addr[1]~1756 at LC51
A1L6_or_out = A1L7Q;
A1L6 = A1L6_or_out;