ctr.fit.eqn

用cpld控制时序通过usb传送数据到pc机的vhdl源码

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--A1L95 is reduce_nor~355 at LC36
A1L95_p1_out = !pa_in[1] & pa3 & !pa_in[0];
A1L95_or_out = A1L95_p1_out;
A1L95 = !(A1L95_or_out);


--A1L81 is busy~2 at LC19
A1L81_or_out = busy;
A1L81 = A1L81_or_out;


--A1L06 is reduce_nor~358 at LC46
A1L06_p1_out = !pa_in[1] & !pa3 & pa_in[0];
A1L06_or_out = A1L06_p1_out;
A1L06 = A1L06_or_out;


--A1L16 is reduce_nor~360 at LC40
A1L16_p1_out = pa_in[1] & !pa3 & pa_in[0];
A1L16_or_out = A1L16_p1_out;
A1L16 = !(A1L16_or_out);


--q[0] is q[0] at LC18
q[0]_reg_input = VCC;
q[0]_p3_out = empty & Uflag[1];
q[0] = TFFE(q[0]_reg_input, GLOBAL(clk), , , q[0]_p3_out);


--A1L44Q is led1~reg0 at LC37
A1L44Q_p1_out = pa_in[1] & !pa3 & !pa_in[0];
A1L44Q_or_out = A1L44Q_p1_out;
A1L44Q_reg_input = !(A1L44Q_or_out);
A1L44Q = DFFE(A1L44Q_reg_input, GLOBAL(clk), , reset, );


--counter64[0] is counter64[0] at LC48
counter64[0]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[0];
counter64[0]_or_out = counter64[0]_p1_out;
counter64[0]_reg_input = counter64[0]_or_out;
counter64[0] = DFFE(counter64[0]_reg_input, GLOBAL(clk), , , reset);


--counter64[7] is counter64[7] at LC47
counter64[7]_p0_out = counter64[7] & pa_in[0];
counter64[7]_p1_out = counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[2] & counter64[0] & counter64[1] & counter64[7];
counter64[7]_p2_out = counter64[7] & !pa_in[1];
counter64[7]_p4_out = counter64[7] & pa3;
counter64[7]_or_out = counter64[7]_p0_out # counter64[7]_p1_out # counter64[7]_p2_out # counter64[7]_p4_out;
counter64[7]_reg_input = counter64[7]_or_out;
counter64[7] = TFFE(counter64[7]_reg_input, GLOBAL(clk), , , reset);


--A1L04Q is fiford~reg0 at LC20
A1L04Q_p1_out = !q[0] & empty & Uflag[1];
A1L04Q_or_out = A1L04Q_p1_out;
A1L04Q_reg_input = !(A1L04Q_or_out);
A1L04Q = DFFE(A1L04Q_reg_input, GLOBAL(clk), , , );


--A1L93 is fiford~14 at LC62
A1L93_or_out = A1L04Q;
A1L93 = A1L93_or_out;


--counter16[0] is counter16[0] at LC44
counter16[0]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & reset & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1];
counter16[0]_p2_out = !pa_in[1] & reset & counter16[0];
counter16[0]_p3_out = pa3 & reset & counter16[0];
counter16[0]_p4_out = pa_in[0] & reset & counter16[0];
counter16[0]_or_out = counter16[0]_p1_out # counter16[0]_p2_out # counter16[0]_p3_out # counter16[0]_p4_out;
counter16[0]_reg_input = counter16[0]_or_out;
counter16[0] = TFFE(counter16[0]_reg_input, GLOBAL(clk), , , );


--counter64[1] is counter64[1] at LC43
counter64[1]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[0] & !counter64[1];
counter64[1]_p2_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[0] & counter64[1];
counter64[1]_or_out = counter64[1]_p1_out # counter64[1]_p2_out;
counter64[1]_reg_input = counter64[1]_or_out;
counter64[1] = DFFE(counter64[1]_reg_input, GLOBAL(clk), , , reset);


--counter16[1] is counter16[1] at LC42
counter16[1]_p1_out = counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[1]_p2_out = !pa_in[1] & reset & counter16[1];
counter16[1]_p3_out = pa3 & reset & counter16[1];
counter16[1]_p4_out = pa_in[0] & reset & counter16[1];
counter16[1]_or_out = counter16[1]_p1_out # counter16[1]_p2_out # counter16[1]_p3_out # counter16[1]_p4_out;
counter16[1]_reg_input = counter16[1]_or_out;
counter16[1] = TFFE(counter16[1]_reg_input, GLOBAL(clk), , , );


--counter64[2] is counter64[2] at LC38
counter64[2]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[2] & !counter64[0];
counter64[2]_p2_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[2] & !counter64[1];
counter64[2]_p4_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[2] & counter64[0] & counter64[1];
counter64[2]_or_out = counter64[2]_p1_out # counter64[2]_p2_out # counter64[2]_p4_out;
counter64[2]_reg_input = counter64[2]_or_out;
counter64[2] = DFFE(counter64[2]_reg_input, GLOBAL(clk), , , reset);


--counter16[2] is counter16[2] at LC63
counter16[2]_p1_out = counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[2]_p2_out = !pa_in[1] & reset & counter16[2];
counter16[2]_p3_out = pa3 & reset & counter16[2];
counter16[2]_p4_out = pa_in[0] & reset & counter16[2];
counter16[2]_or_out = counter16[2]_p1_out # counter16[2]_p2_out # counter16[2]_p3_out # counter16[2]_p4_out;
counter16[2]_reg_input = counter16[2]_or_out;
counter16[2] = TFFE(counter16[2]_reg_input, GLOBAL(clk), , , );


--counter64[3] is counter64[3] at LC33
counter64[3]_p0_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[3]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & !counter64[2];
counter64[3]_p2_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & !counter64[0];
counter64[3]_p4_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & !counter64[1];
counter64[3]_or_out = counter64[3]_p0_out # counter64[3]_p1_out # counter64[3]_p2_out # counter64[3]_p4_out;
counter64[3]_reg_input = counter64[3]_or_out;
counter64[3] = DFFE(counter64[3]_reg_input, GLOBAL(clk), , , reset);


--counter16[3] is counter16[3] at LC61
counter16[3]_p1_out = counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[3]_p2_out = !pa_in[1] & reset & counter16[3];
counter16[3]_p3_out = pa3 & reset & counter16[3];
counter16[3]_p4_out = pa_in[0] & reset & counter16[3];
counter16[3]_or_out = counter16[3]_p1_out # counter16[3]_p2_out # counter16[3]_p3_out # counter16[3]_p4_out;
counter16[3]_reg_input = counter16[3]_or_out;
counter16[3] = TFFE(counter16[3]_reg_input, GLOBAL(clk), , , );


--counter64[4] is counter64[4] at LC34
counter64[4]_p0_out = pa_in[0] & counter64[4];
counter64[4]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[4]_p2_out = !pa_in[1] & counter64[4];
counter64[4]_p4_out = pa3 & counter64[4];
counter64[4]_or_out = counter64[4]_p0_out # counter64[4]_p1_out # counter64[4]_p2_out # counter64[4]_p4_out;
counter64[4]_reg_input = counter64[4]_or_out;
counter64[4] = TFFE(counter64[4]_reg_input, GLOBAL(clk), , , reset);


--counter64[5] is counter64[5] at LC35
counter64[5]_p0_out = pa_in[0] & counter64[5];
counter64[5]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[4] & counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[5]_p2_out = !pa_in[1] & counter64[5];
counter64[5]_p4_out = pa3 & counter64[5];
counter64[5]_or_out = counter64[5]_p0_out # counter64[5]_p1_out # counter64[5]_p2_out # counter64[5]_p4_out;
counter64[5]_reg_input = counter64[5]_or_out;
counter64[5] = TFFE(counter64[5]_reg_input, GLOBAL(clk), , , reset);


--counter16[4] is counter16[4] at LC56
counter16[4]_p0_out = pa_in[0] & reset & counter16[4];
counter16[4]_p1_out = counter16[5] & counter16[3] & counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[4]_p2_out = counter16[3] & counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & reset & counter16[4];
counter16[4]_p3_out = !pa_in[1] & reset & counter16[4];
counter16[4]_p4_out = pa3 & reset & counter16[4];
counter16[4]_or_out = counter16[4]_p0_out # counter16[4]_p1_out # counter16[4]_p2_out # counter16[4]_p3_out # counter16[4]_p4_out;
counter16[4]_reg_input = counter16[4]_or_out;
counter16[4] = TFFE(counter16[4]_reg_input, GLOBAL(clk), , , );


--counter64[6] is counter64[6] at LC39
counter64[6]_p0_out = pa_in[0] & counter64[6];
counter64[6]_p1_out = pa_in[1] & !pa3 & !pa_in[0] & counter64[5] & counter64[4] & counter64[3] & counter64[2] & counter64[0] & counter64[1];
counter64[6]_p2_out = !pa_in[1] & counter64[6];
counter64[6]_p4_out = pa3 & counter64[6];
counter64[6]_or_out = counter64[6]_p0_out # counter64[6]_p1_out # counter64[6]_p2_out # counter64[6]_p4_out;
counter64[6]_reg_input = counter64[6]_or_out;
counter64[6] = TFFE(counter64[6]_reg_input, GLOBAL(clk), , , reset);


--counter16[5] is counter16[5] at LC50
counter16[5]_p1_out = counter16[4] & counter16[3] & counter16[2] & counter16[1] & counter16[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & pa_in[1] & !pa3 & !pa_in[0] & reset;
counter16[5]_p2_out = !pa_in[1] & reset & counter16[5];
counter16[5]_p3_out = pa3 & reset & counter16[5];
counter16[5]_p4_out = pa_in[0] & reset & counter16[5];
counter16[5]_or_out = counter16[5]_p1_out # counter16[5]_p2_out # counter16[5]_p3_out # counter16[5]_p4_out;
counter16[5]_reg_input = counter16[5]_or_out;
counter16[5] = TFFE(counter16[5]_reg_input, GLOBAL(clk), , , );


--A1L85Q is r_c~reg0 at LC57
A1L85Q_p1_out = pa_in[1] & !pa3 & !pa_in[0] & !A1L85Q & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[0] & counter64[2] & counter64[1];
A1L85Q_p2_out = pa_in[1] & !pa3 & !pa_in[0] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[0] & counter64[2] & counter64[1] & !counter64[3];
A1L85Q_or_out = A1L85Q_p1_out # A1L85Q_p2_out;
A1L85Q_reg_input = !(A1L85Q_or_out);
A1L85Q = DFFE(A1L85Q_reg_input, GLOBAL(clk), , reset, );


--A1L4Q is addr[0]~reg0 at LC55
A1L4Q_p0_out = A1L4Q & pa_in[0];
A1L4Q_p1_out = !counter16[2] & !counter16[0] & !counter16[5] & !counter16[4] & !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & A1L4Q;
A1L4Q_p3_out = A1L4Q & !pa_in[1];
A1L4Q_p4_out = A1L4Q & pa3;
A1L4Q_or_out = A1L46 # A1L4Q_p0_out # A1L4Q_p1_out # A1L4Q_p3_out # A1L4Q_p4_out;
A1L4Q_reg_input = A1L4Q_or_out;
A1L4Q = TFFE(A1L4Q_reg_input, GLOBAL(clk), reset, , );


--A1L21 is addr~1736 at SEXP50
A1L21 = EXP(!counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & !counter16[5] & !counter16[4]);


--A1L31 is addr~1737 at SEXP51
A1L31 = EXP(!counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[1] & !counter16[0] & counter16[2] & !counter16[5] & !counter16[4]);


--A1L41 is addr~1738 at SEXP52
A1L41 = EXP(!counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[0] & counter16[2] & !counter16[3] & !counter16[5] & !counter16[4]);


--A1L11Q is addr[3]~reg0 at LC53
A1L11Q_p1_out = A1L31 & A1L41;
A1L11Q_p0_out = A1L31 & A1L41 & pa_in[1] & !pa3 & !pa_in[0] & A1L21 & !A1L11Q;
A1L11Q_p2_out = A1L31 & A1L41 & !counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & !counter16[1] & !counter16[2] & counter16[3] & !counter16[5] & !counter16[4];
A1L11Q_p3_out = A1L31 & A1L41 & !counter64[7] & pa_in[1] & !pa3 & !pa_in[0] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[3] & !counter16[5] & !counter16[4] & !counter16[0];
A1L11Q_or_out = A1L11Q_p0_out # A1L11Q_p2_out # A1L11Q_p3_out;
A1L11Q_reg_input = A1L11Q_p1_out $ A1L11Q_or_out;
A1L11Q = DFFE(A1L11Q_reg_input, GLOBAL(clk), , reset, );


--A1L51 is addr~1747 at SEXP57
A1L51 = EXP(counter16[1] & counter16[0]);


--A1L61 is addr~1748 at SEXP58
A1L61 = EXP(pa_in[1] & !pa3 & !pa_in[0]);


--A1L9Q is addr[2]~reg0 at LC49
A1L9Q_p1_out = !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & counter16[1] & counter16[2] & counter16[3] & !counter16[5] & !counter16[4];
A1L9Q_p2_out = A1L21 & A1L9Q;
A1L9Q_p3_out = !counter64[7] & counter64[6] & counter64[5] & counter64[4] & counter64[3] & counter64[0] & counter64[2] & counter64[1] & !counter16[2] & !counter16[5] & !counter16[4] & A1L51;
A1L9Q_or_out = A1L61 # A1L9Q_p1_out # A1L9Q_p2_out # A1L9Q_p3_out;
A1L9Q_reg_input = A1L9Q_or_out;
A1L9Q = DFFE(A1L9Q_reg_input, GLOBAL(clk), , reset, );