ctr.map.rpt

用cpld控制时序通过usb传送数据到pc机的vhdl源码

+-----------------------------------------------+
; Source assignments for Top-level Entity: |ctr ;
+----------------+-------+------+---------------+
; Assignment     ; Value ; From ; To            ;
+----------------+-------+------+---------------+
; POWER_UP_LEVEL ; Low   ; -    ; q[1]          ;
; POWER_UP_LEVEL ; Low   ; -    ; q[0]          ;
; POWER_UP_LEVEL ; Low   ; -    ; counter16[0]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter16[1]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter16[2]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter16[3]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter16[4]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter16[5]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[0]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[1]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[2]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[3]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[4]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[5]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[6]  ;
; POWER_UP_LEVEL ; Low   ; -    ; counter64[7]  ;
+----------------+-------+------+---------------+


+-------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: lpm_add_sub:Add0 ;
+------------------------+-------------+----------------------------+
; Parameter Name         ; Value       ; Type                       ;
+------------------------+-------------+----------------------------+
; LPM_WIDTH              ; 8           ; Untyped                    ;
; LPM_REPRESENTATION     ; UNSIGNED    ; Untyped                    ;
; LPM_DIRECTION          ; ADD         ; Untyped                    ;
; ONE_INPUT_IS_CONSTANT  ; YES         ; Untyped                    ;
; LPM_PIPELINE           ; 0           ; Untyped                    ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                    ;
; REGISTERED_AT_END      ; 0           ; Untyped                    ;
; OPTIMIZE_FOR_SPEED     ; 9           ; Untyped                    ;
; USE_CS_BUFFERS         ; 1           ; Untyped                    ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                    ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH         ;
; DEVICE_FAMILY          ; MAX7000AE   ; Untyped                    ;
; USE_WYS                ; OFF         ; Untyped                    ;
; STYLE                  ; FAST        ; Untyped                    ;
; CBXI_PARAMETER         ; add_sub_eqh ; Untyped                    ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                 ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY               ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE               ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE             ;
+------------------------+-------------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Web Edition
    Info: Processing started: Fri Dec 01 14:22:40 2006
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ctr -c ctr
Info: Found 2 design units, including 1 entities, in source file ctr.vhd
    Info: Found design unit 1: ctr-behavior
    Info: Found entity 1: ctr
Warning: Can't analyze file -- file E:/2006.3.27/ctr 1101.vhd is missing
Info: Elaborating entity "ctr" for the top level hierarchy
Warning (10034): Output port "slrd" at ctr.vhd(18) has no driver
Warning: Reduced register "q[1]" with stuck data_in port to stuck value GND
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder[0]", which is child of megafunction instantiation "lpm_add_sub:Add0"
Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder[0]|a_csnbuffer:oflow_node", which is child of megafunction instantiation "lpm_add_sub:Add0"
Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|addcore:adder[0]|a_csnbuffer:result_node", which is child of megafunction instantiation "lpm_add_sub:Add0"
Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/look_add.tdf
    Info: Found entity 1: look_add
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|look_add:look_ahead_unit", which is child of megafunction instantiation "lpm_add_sub:Add0"
Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "lpm_add_sub:Add0"
Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "lpm_add_sub:Add0"
Info: Instantiated megafunction "lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "YES"
Info: Ignored 8 buffer(s)
    Info: Ignored 8 SOFT buffer(s)
Info: Duplicate registers merged to single register
    Info: Duplicate register "slwr~reg0" merged to single register "fiford~reg0"
Info: Registers with preset signals will power-up high
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "slrd" stuck at GND
    Warning: Pin "pa2" stuck at VCC
    Warning: Pin "pa4" stuck at GND
    Warning: Pin "pa5" stuck at VCC
    Warning: Pin "pa6" stuck at VCC
    Warning: Pin "pa7" stuck at GND
Info: Promoted pin-driven signal(s) to global signal
    Info: Promoted clock signal driven by pin "clk" to global clock signal
Warning: Design contains 3 input pin(s) that do not drive logic
    Warning: No output dependent on input pin "ifclk"
    Warning: No output dependent on input pin "Uflag[0]"
    Warning: No output dependent on input pin "Uflag[2]"
Info: Implemented 70 device resources after synthesis - the final resource count might be different
    Info: Implemented 11 input pins
    Info: Implemented 18 output pins
    Info: Implemented 37 macrocells
    Info: Implemented 4 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 14 warnings
    Info: Processing ended: Fri Dec 01 14:22:45 2006
    Info: Elapsed time: 00:00:06