⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 up3_clock.map.qmsg

📁 在UP3开发板上已经验证过的VHDL代码。精确到十分之一秒
💻 QMSG
📖 第 1 页 / 共 5 页
字号:
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "\\READ_I2C:read_slave_address\[7\] data_in VCC " "Warning: Reduced register \"\\READ_I2C:read_slave_address\[7\]\" with stuck data_in port to stuck value VCC" {  } {  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "\\READ_I2C:read_slave_address\[8\] High " "Info: Power-up level of register \"\\READ_I2C:read_slave_address\[8\]\" is not specified -- using power-up level of High to minimize register" {  } {  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "\\READ_I2C:read_slave_address\[8\] data_in VCC " "Warning: Reduced register \"\\READ_I2C:read_slave_address\[8\]\" with stuck data_in port to stuck value VCC" {  } {  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "LCD_RW~reg0 data_in GND " "Warning: Reduced register \"LCD_RW~reg0\" with stuck data_in port to stuck value GND" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[3\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[3\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[2\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[2\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:write_slave_address\[3\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:write_slave_address\[3\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[1\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[1\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:write_slave_address\[4\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:write_slave_address\[4\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[4\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[4\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:write_slave_address\[6\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:write_slave_address\[6\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[7\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[7\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[6\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[6\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[5\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[5\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:write_slave_address\[2\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:write_slave_address\[2\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:sub_address\[8\] \\READ_I2C:write_slave_address\[1\] " "Info: Duplicate register \"\\READ_I2C:sub_address\[8\]\" merged to single register \"\\READ_I2C:write_slave_address\[1\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:write_slave_address\[8\] \\READ_I2C:write_slave_address\[5\] " "Info: Duplicate register \"\\READ_I2C:write_slave_address\[8\]\" merged to single register \"\\READ_I2C:write_slave_address\[5\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "\\READ_I2C:write_slave_address\[7\] \\READ_I2C:write_slave_address\[5\] " "Info: Duplicate register \"\\READ_I2C:write_slave_address\[7\]\" merged to single register \"\\READ_I2C:write_slave_address\[5\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "\\READ_I2C:write_slave_address\[5\] High " "Info: Power-up level of register \"\\READ_I2C:write_slave_address\[5\]\" is not specified -- using power-up level of High to minimize register" {  } {  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "\\READ_I2C:write_slave_address\[5\] data_in VCC " "Warning: Reduced register \"\\READ_I2C:write_slave_address\[5\]\" with stuck data_in port to stuck value VCC" {  } {  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "\\READ_I2C:write_slave_address\[1\] data_in GND " "Warning: Reduced register \"\\READ_I2C:write_slave_address\[1\]\" with stuck data_in port to stuck value GND" {  } {  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|UP3_CLOCK\|W_current_state 22 " "Info: State machine \"\|UP3_CLOCK\|W_current_state\" contains 22 states" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 55 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|UP3_CLOCK\|R_current_state 23 " "Info: State machine \"\|UP3_CLOCK\|R_current_state\" contains 23 states" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 48 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|UP3_CLOCK\|next_command 46 " "Info: State machine \"\|UP3_CLOCK\|next_command\" contains 46 states" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 28 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|UP3_CLOCK\|state 46 " "Info: State machine \"\|UP3_CLOCK\|state\" contains 46 states" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 28 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|UP3_CLOCK\|W_current_state " "Info: Selected Auto state machine encoding method for state machine \"\|UP3_CLOCK\|W_current_state\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 55 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|UP3_CLOCK\|W_current_state " "Info: Encoding result for state machine \"\|UP3_CLOCK\|W_current_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "22 " "Info: Completed encoding using 22 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_delay " "Info: Encoded state bit \"W_current_state.w_delay\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_stop " "Info: Encoded state bit \"W_current_state.w_stop\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack9 " "Info: Encoded state bit \"W_current_state.w_check_ack9\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack8 " "Info: Encoded state bit \"W_current_state.w_check_ack8\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack7 " "Info: Encoded state bit \"W_current_state.w_check_ack7\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack6 " "Info: Encoded state bit \"W_current_state.w_check_ack6\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack5 " "Info: Encoded state bit \"W_current_state.w_check_ack5\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack4 " "Info: Encoded state bit \"W_current_state.w_check_ack4\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack3 " "Info: Encoded state bit \"W_current_state.w_check_ack3\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack2 " "Info: Encoded state bit \"W_current_state.w_check_ack2\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_check_ack1 " "Info: Encoded state bit \"W_current_state.w_check_ack1\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_write_data7 " "Info: Encoded state bit \"W_current_state.w_write_data7\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_write_data6 " "Info: Encoded state bit \"W_current_state.w_write_data6\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_write_data5 " "Info: Encoded state bit \"W_current_state.w_write_data5\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_write_data4 " "Info: Encoded state bit \"W_current_state.w_write_data4\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_write_data3 " "Info: Encoded state bit \"W_current_state.w_write_data3\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_write_data2 " "Info: Encoded state bit \"W_current_state.w_write_data2\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_write_data1 " "Info: Encoded state bit \"W_current_state.w_write_data1\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_transmit_sub_address " "Info: Encoded state bit \"W_current_state.w_transmit_sub_address\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_transmit_slave_address " "Info: Encoded state bit \"W_current_state.w_transmit_slave_address\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_start " "Info: Encoded state bit \"W_current_state.w_start\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "W_current_state.w_prepare " "Info: Encoded state bit \"W_current_state.w_prepare\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_prepare 0000000000000000000000 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_prepare\" uses code string \"0000000000000000000000\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_start 0000000000000000000011 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_start\" uses code string \"0000000000000000000011\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_transmit_slave_address 0000000000000000000101 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_transmit_slave_address\" uses code string \"0000000000000000000101\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_transmit_sub_address 0000000000000000001001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_transmit_sub_address\" uses code string \"0000000000000000001001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_write_data1 0000000000000000010001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_write_data1\" uses code string \"0000000000000000010001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_write_data2 0000000000000000100001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_write_data2\" uses code string \"0000000000000000100001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_write_data3 0000000000000001000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_write_data3\" uses code string \"0000000000000001000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_write_data4 0000000000000010000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_write_data4\" uses code string \"0000000000000010000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_write_data5 0000000000000100000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_write_data5\" uses code string \"0000000000000100000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_write_data6 0000000000001000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_write_data6\" uses code string \"0000000000001000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_write_data7 0000000000010000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_write_data7\" uses code string \"0000000000010000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack1 0000000000100000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack1\" uses code string \"0000000000100000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack2 0000000001000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack2\" uses code string \"0000000001000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack3 0000000010000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack3\" uses code string \"0000000010000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack4 0000000100000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack4\" uses code string \"0000000100000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack5 0000001000000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack5\" uses code string \"0000001000000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack6 0000010000000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack6\" uses code string \"0000010000000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack7 0000100000000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack7\" uses code string \"0000100000000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack8 0001000000000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack8\" uses code string \"0001000000000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_check_ack9 0010000000000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_check_ack9\" uses code string \"0010000000000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_stop 0100000000000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_stop\" uses code string \"0100000000000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|UP3_CLOCK\|W_current_state.w_delay 1000000000000000000001 " "Info: State \"\|UP3_CLOCK\|W_current_state.w_delay\" uses code string \"1000000000000000000001\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0}  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 55 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|UP3_CLOCK\|R_current_state " "Info: Selected Auto state machine encoding method for state machine \"\|UP3_CLOCK\|R_current_state\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 48 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|UP3_CLOCK\|R_current_state " "Info: Encoding result for state machine \"\|UP3_CLOCK\|R_current_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "23 " "Info: Completed encoding using 23 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_stop " "Info: Encoded state bit \"R_current_state.r_stop\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack9 " "Info: Encoded state bit \"R_current_state.r_check_ack9\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack8 " "Info: Encoded state bit \"R_current_state.r_check_ack8\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack7 " "Info: Encoded state bit \"R_current_state.r_check_ack7\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack6 " "Info: Encoded state bit \"R_current_state.r_check_ack6\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack5 " "Info: Encoded state bit \"R_current_state.r_check_ack5\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack4 " "Info: Encoded state bit \"R_current_state.r_check_ack4\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack3 " "Info: Encoded state bit \"R_current_state.r_check_ack3\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack2 " "Info: Encoded state bit \"R_current_state.r_check_ack2\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_check_ack1 " "Info: Encoded state bit \"R_current_state.r_check_ack1\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_read_data7 " "Info: Encoded state bit \"R_current_state.r_read_data7\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_read_data6 " "Info: Encoded state bit \"R_current_state.r_read_data6\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_read_data5 " "Info: Encoded state bit \"R_current_state.r_read_data5\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_read_data4 " "Info: Encoded state bit \"R_current_state.r_read_data4\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_read_data3 " "Info: Encoded state bit \"R_current_state.r_read_data3\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_read_data2 " "Info: Encoded state bit \"R_current_state.r_read_data2\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_read_data1 " "Info: Encoded state bit \"R_current_state.r_read_data1\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_transmit_read " "Info: Encoded state bit \"R_current_state.r_transmit_read\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_start1 " "Info: Encoded state bit \"R_current_state.r_start1\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_transmit_sub_address " "Info: Encoded state bit \"R_current_state.r_transmit_sub_address\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_transmit_slave_address " "Info: Encoded state bit \"R_current_state.r_transmit_slave_address\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "R_current_state.r_start " "Info: Encoded state bit \"R_current_state.r_start\"" {  } { { "UP3_CLOCK.vhd" "" { Text "F:/课件/EDA实验代码/实验5-时钟设计-最终版/UP3_CLOCK.vhd" 519 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCE

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -