up3_clock.vhd

在UP3开发板上已经验证过的VHDL代码。精确到十分之一秒

				    when 1=>sda<='Z';			    
				    when 3=>scl<='1';
				    when 5=>RTC_DATE(cnt1)<=sda;				    
				    when 7=>scl<='0';				    
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        R_current_state<=R_check_ack8;
					        FLAG<='1';
					        else R_current_state<=R_read_data5;
					        end if;
				    when others=>null;
				    end case;	
	
	 when R_check_ack8=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='0';
				    when 3 =>scl<='1';				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>R_current_state<=R_read_data6;						  
						     count1:=0;
				    when others=>null;
				    end case;		

	 when R_read_data6=>count1:=count1+1;FLAG<='0';         --读操作
	                case count1 is
				    when 1=>sda<='Z';			    
				    when 3=>scl<='1';
				    when 5=>RTC_MONTH(cnt1)<=sda;				    
				    when 7=>scl<='0';				    
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        R_current_state<=R_check_ack9;
					        FLAG<='1';
					        else R_current_state<=R_read_data6;
					        end if;
				    when others=>null;
				    end case;
	
	 when R_check_ack9=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='0';
				    when 3 =>scl<='1';				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>R_current_state<=R_transmit_sub_address;						  
						     count1:=0;
				    when others=>null;
				    end case;		
		
	 when R_read_data7=>count1:=count1+1;FLAG<='0';         --读操作
	                case count1 is
				    when 1=>sda<='Z';			    
				    when 3=>scl<='1';
				    when 5=>RTC_YEAR(cnt1)<=sda;				    
				    when 7=>scl<='0';				    
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        R_current_state<=R_stop;
					        FLAG<='1';
					        else R_current_state<=R_read_data7;
					        end if;
				    when others=>null;
				    end case;	
					
	 when R_stop=>count1:=count1+1;   --产生停止信号
	                case count1 is
				    when 1=>sda<='0';
				    when 3=>scl<='1';
				    when 6=>sda<='1';
   			        when 8=>count1:=0;
                         R_current_state<=R_prepare;
				    when others=>null;
					end case;
	
	 when others=>NULL;
     end case;
    
     else
        if DipSwitch3 = '0' then
		case W_current_state is
		
		when W_prepare=>pre_cnt:=pre_cnt+1;         --准备状态，等各个器件复位
	      			if pre_cnt="00000010" then 
	                pre_cnt:="00000000";
			 		W_current_state<=W_start;			
			        sub_address:="00000000";
					write_slave_address:="11010000";
					count1:=0;
					cnt1:=8;
					sda<='1';
					scl<='1';
	   	  			else W_current_state<=W_prepare;
		  			end if;	
					
        when W_start=>count1:=count1+1;      --起始信号产生状态
	                case count1 is
				    when 1=>sda<='1';
				    when 3=>scl<='1';
				    when 5=>sda<='0';
				    when 7=>scl<='0';
				    when 8=>count1:=0;
					W_current_state<=W_transmit_slave_address;
				    when others=>null;
				    end  case;
		
		when W_transmit_slave_address=>count1:=count1+1;  --发送器件从地址
	                case count1 is
				    when 1=>sda<=write_slave_address(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1; 
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack1;
					        else W_current_state<=W_transmit_slave_address;
					        end if;
				    when others=>null;
				    end case;
					
		when W_check_ack1=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack1;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_transmit_sub_address;						  
						     count1:=0;
				    when others=>null;
				    end case;

		when W_transmit_sub_address=>count1:=count1+1; --发送器件子地址
	                case count1 is				   
				    when 1=>sda<=sub_address(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack2;
					        else W_current_state<=W_transmit_sub_address;
					        end if;
				    when others=>null;
				    end case;			 
	
		when W_check_ack2=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack2;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_write_data1;						  
						     count1:=0;
				    when others=>null;
				    end case;	
				    

		when W_write_data1=>count1:=count1+1; 
	                case count1 is
				    when 1=>sda<=write_sec(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack3;
					        else W_current_state<=W_write_data1;
					        end if;
				    when others=>null;
				    end case;
		
		when W_check_ack3=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack3;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_write_data2;						  
						     count1:=0;
				    when others=>null;
				    end case;	
		
		when W_write_data2=>count1:=count1+1; 
	                case count1 is
				    when 1=>sda<=write_min(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack4;
					        else W_current_state<=W_write_data2;
					        end if;
				    when others=>null;
				    end case;
					
		
		when W_check_ack4=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack4;
				             else
				            W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_write_data3;						  
						     count1:=0;
				    when others=>null;
				    end case;
	    
		when W_write_data3=>count1:=count1+1; 
	                case count1 is
				    when 1=>sda<=write_hor(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack5;
					        else W_current_state<=W_write_data3;
					        end if;
				    when others=>null;
				    end case;
		
		when W_check_ack5=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack5;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_write_data4;						  
						     count1:=0;
				    when others=>null;
				    end case;
					
					
		when W_write_data4=>count1:=count1+1; 
	                case count1 is
				    when 1=>sda<=write_day(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack6;
					        else W_current_state<=W_write_data4;
					        end if;
				    when others=>null;
				    end case;
		
		when W_check_ack6=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack6;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_write_data5;						  
						     count1:=0;
				    when others=>null;
				    end case;

        when W_write_data5=>count1:=count1+1; 
	                case count1 is
				    when 1=>sda<=write_date(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack7;
					        else W_current_state<=W_write_data5;
					        end if;
				    when others=>null;
				    end case;
		
		when W_check_ack7=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack7;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_write_data6;						  
						     count1:=0;
				    when others=>null;
				    end case;
					
		when W_write_data6=>count1:=count1+1; 
	                case count1 is
				    when 1=>sda<=write_month(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack8;
					        else W_current_state<=W_write_data6;
					        end if;
				    when others=>null;
				    end case;
		
		when W_check_ack8=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack8;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_write_data7;						  
						     count1:=0;
				    when others=>null;
				    end case;
					
		
		when W_write_data7=>count1:=count1+1; 
	                case count1 is
				    when 1=>sda<=write_year(cnt1);
				    when 3=>scl<='1';
				    when 7=>scl<='0';
				    when 8=>cnt1:=cnt1-1;
					        count1:=0;
					        if cnt1=0 then 
							cnt1:=8;
					        W_current_state<=W_check_ack9;
					        else W_current_state<=W_write_data7;
					        end if;
				    when others=>null;
				    end case;
					--------RTC_LED<='1'; ----////ACK8 KE YI ER DATA7 bu xing	
					
		when W_check_ack9=>count1:=count1+1;         --查询应答信号
	                case count1 is
				    when 1 =>sda<='Z';
				    when 3 =>scl<='1';
				    when 5 =>if sda = '0' then
				             W_current_state<=W_check_ack9;
				             else
				             W_current_state<=W_prepare;
				             end if;				    
				    when 7 =>scl<='0';				    				    				    
				    when 8 =>W_current_state<=W_stop;						  
						     count1:=0;
				    when others=>null;
				    end case;