📄 dds.qsf
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# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# The default values for assignments are stored in the file
# DDS_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 6.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:08:11 MAY 23, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VHDL_FILE rom.vhd
set_global_assignment -name VHDL_FILE DDS.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE DDS.vwf
set_global_assignment -name VHDL_FILE SUM.vhd
set_global_assignment -name MIF_FILE "C:/Documents and Settings/Owner/桌面/DDS.mif"
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_93 -to CLK
set_location_assignment PIN_10 -to M[7]
set_location_assignment PIN_7 -to M[6]
set_location_assignment PIN_6 -to M[5]
set_location_assignment PIN_5 -to M[4]
set_location_assignment PIN_4 -to M[3]
set_location_assignment PIN_3 -to M[2]
set_location_assignment PIN_2 -to M[1]
set_location_assignment PIN_1 -to M[0]
set_location_assignment PIN_72 -to Q[7]
set_location_assignment PIN_71 -to Q[6]
set_location_assignment PIN_70 -to Q[5]
set_location_assignment PIN_69 -to Q[4]
set_location_assignment PIN_68 -to Q[3]
set_location_assignment PIN_67 -to Q[2]
set_location_assignment PIN_52 -to Q[1]
set_location_assignment PIN_51 -to Q[0]
set_location_assignment PIN_36 -to EN
set_location_assignment PIN_35 -to RESET
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY DDS
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C3T144C8
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
# -----------------
# start ENTITY(DDS)
# ---------------------------
# start DESIGN_PARTITION(Top)
# Incremental Compilation Assignments
# ===================================
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
# end DESIGN_PARTITION(Top)
# -------------------------
# end ENTITY(DDS)
# ---------------
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