dds.tan.rpt

实现DDS频率可调得VHDL程序

; N/A   ; None         ; 12.075 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg7 ; Q[4] ; CLK        ;
; N/A   ; None         ; 12.075 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg8 ; Q[4] ; CLK        ;
; N/A   ; None         ; 12.075 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg9 ; Q[4] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg0 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg1 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg2 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg3 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg4 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg5 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg6 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg7 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg8 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.040 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg9 ; Q[7] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg0 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg1 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg2 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg3 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg4 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg5 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg6 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg7 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg8 ; Q[5] ; CLK        ;
; N/A   ; None         ; 12.032 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg9 ; Q[5] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg0 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg1 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg2 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg3 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg4 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg5 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg6 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg7 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg8 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.986 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg9 ; Q[6] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg0 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg1 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg2 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg3 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg4 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg5 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg6 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg7 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg8 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.679 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg9 ; Q[3] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg0 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg1 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg2 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg3 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg4 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg5 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg6 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg7 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg8 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.664 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg9 ; Q[2] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg0 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg1 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg2 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg3 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg4 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg5 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg6 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg7 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg8 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.425 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a1~porta_address_reg9 ; Q[1] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg0 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg1 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg2 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg3 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg4 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg5 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg6 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg7 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg8 ; Q[0] ; CLK        ;
; N/A   ; None         ; 11.379 ns  ; rom:U2|altsyncram:altsyncram_component|altsyncram_tdq:auto_generated|ram_block1a0~porta_address_reg9 ; Q[0] ; CLK        ;
+-------+--------------+------------+------------------------------------------------------------------------------------------------------+------+------------+


+-----------------------------------------------------------------------------+
; th                                                                          ;
+---------------+-------------+-----------+------+-----------------+----------+
; Minimum Slack ; Required th ; Actual th ; From ; To              ; To Clock ;
+---------------+-------------+-----------+------+-----------------+----------+
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[8]  ; CLK      ;
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[9]  ; CLK      ;
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[10] ; CLK      ;
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[11] ; CLK      ;
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[12] ; CLK      ;
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[13] ; CLK      ;
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[14] ; CLK      ;
; N/A           ; None        ; -5.673 ns ; EN   ; SUM:U0|TEMP[15] ; CLK      ;
; N/A           ; None        ; -6.033 ns ; M[7] ; SUM:U0|TEMP[15] ; CLK      ;
; N/A           ; None        ; -6.313 ns ; M[6] ; SUM:U0|TEMP[14] ; CLK      ;
; N/A           ; None        ; -6.463 ns ; M[2] ; SUM:U0|TEMP[10] ; CLK      ;
; N/A           ; None        ; -6.550 ns ; M[5] ; SUM:U0|TEMP[13] ; CLK      ;
; N/A           ; None        ; -6.625 ns ; M[3] ; SUM:U0|TEMP[11] ; CLK      ;
; N/A           ; None        ; -6.720 ns ; M[1] ; SUM:U0|TEMP[9]  ; CLK      ;
; N/A           ; None        ; -6.827 ns ; M[4] ; SUM:U0|TEMP[12] ; CLK      ;
; N/A           ; None        ; -6.839 ns ; M[0] ; SUM:U0|TEMP[8]  ; CLK      ;
; N/A           ; None        ; -6.912 ns ; M[6] ; SUM:U0|TEMP[15] ; CLK      ;
; N/A           ; None        ; -7.062 ns ; M[2] ; SUM:U0|TEMP[11] ; CLK      ;
; N/A           ; None        ; -7.140 ns ; M[2] ; SUM:U0|TEMP[12] ; CLK      ;
; N/A           ; None        ; -7.159 ns ; M[5] ; SUM:U0|TEMP[14] ; CLK      ;
; N/A           ; None        ; -7.234 ns ; M[3] ; SUM:U0|TEMP[12] ; CLK      ;
; N/A           ; None        ; -7.237 ns ; M[5] ; SUM:U0|TEMP[15] ; CLK      ;
; N/A           ; None        ; -7.319 ns ; M[1] ; SUM:U0|TEMP[10] ; CLK      ;
; N/A           ; None        ; -7.364 ns ; M[2] ; SUM:U0|TEMP[13] ; CLK      ;