display2.vhd

来自「消抖程序」· VHDL 代码 · 共 42 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

--计价时的输出与调整时的输出之间的切换 


entity display2 is
port(
      flag0    :in std_logic;                      --计价标志
      switch   :in std_logic;                      --计价时的信息与时间信息的切换 switch为1时显示时间

       pout1   : in std_logic_vector(3 downto 0);  --diplay1 模块输出的结果，即要调整的数据
       pout2   : in std_logic_vector(3 downto 0);
       pout3   : in std_logic_vector(3 downto 0);
       pout4   : in std_logic_vector(3 downto 0);

       time1   : in std_logic_vector(3 downto 0);    --计价状态时的输出数据
       time2   : in std_logic_vector(3 downto 0);
       time3   : in std_logic_vector(3 downto 0);
       time4   : in std_logic_vector(3 downto 0);
     jijia1    : in std_logic_vector(3 downto 0);
     jijia2    : in std_logic_vector(3 downto 0);
     jijia3    : in std_logic_vector(3 downto 0);
      km1      : in std_logic_vector(3 downto 0);
      km2      : in std_logic_vector(3 downto 0);
      wait1    : in std_logic_vector(3 downto 0);
      wait2    : in std_logic_vector(3 downto 0);


        out1  :out std_logic_vector(3 downto 0);
        out2  :out std_logic_vector(3 downto 0);
        out3  :out std_logic_vector(3 downto 0);
        out4  :out std_logic_vector(3 downto 0);
        out5  :out std_logic_vector(3 downto 0);
        out6  :out std_logic_vector(3 downto 0);
        out7  :out std_logic_vector(3 downto 0)


        );
end entity;