📄 moshibianhuan.vhd
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity moshibianhuan is
--产生各种模式标志位
port
( mode : in std_logic:='0';
flag0 : out std_logic:='1'; --计价模式
flag1 : out std_logic:='0'; --调价模式
flag2 : out std_logic:='0' --调时模式
);
end entity;
architecture arc of moshibianhuan is
signal count :std_logic_vector (1 downto 0);
begin
process(mode) is
variable count1 :std_logic_vector (1 downto 0);
begin
if(mode'event and mode='1')then
if(count1="10")then count1:="00";
else
count1:=count1+1;
end if;
end if;
count<=count1;
end process;
process(count) is
begin
case count is
when "00" =>flag0<='1';flag1<='0';flag2<='0';
when "01" =>flag0<='0';flag1<='1';flag2<='0';
when "10" =>flag0<='0';flag1<='0';flag2<='1';
when others=> null;
end case;
end process;
end arc;
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