display1.rpt

消抖程序


Device-Specific Information:                               e:\eda\display1.rpt
display1

** EQUATIONS **

flag1    : INPUT;
flag2    : INPUT;
hour10   : INPUT;
hour11   : INPUT;
hour12   : INPUT;
hour13   : INPUT;
hour20   : INPUT;
hour21   : INPUT;
hour22   : INPUT;
hour23   : INPUT;
price10  : INPUT;
price11  : INPUT;
price12  : INPUT;
price13  : INPUT;
price20  : INPUT;
price21  : INPUT;
price22  : INPUT;
price23  : INPUT;
price30  : INPUT;
price31  : INPUT;
price32  : INPUT;
price33  : INPUT;
sec10    : INPUT;
sec11    : INPUT;
sec12    : INPUT;
sec13    : INPUT;
sec20    : INPUT;
sec21    : INPUT;
sec22    : INPUT;
sec23    : INPUT;

-- Node name is 'pout10' 
-- Equation name is 'pout10', type is output 
pout10   =  _LC4_B4;

-- Node name is 'pout11' 
-- Equation name is 'pout11', type is output 
pout11   =  _LC6_B4;

-- Node name is 'pout12' 
-- Equation name is 'pout12', type is output 
pout12   =  _LC1_B1;

-- Node name is 'pout13' 
-- Equation name is 'pout13', type is output 
pout13   =  _LC2_B1;

-- Node name is 'pout20' 
-- Equation name is 'pout20', type is output 
pout20   =  _LC5_C18;

-- Node name is 'pout21' 
-- Equation name is 'pout21', type is output 
pout21   =  _LC2_C18;

-- Node name is 'pout22' 
-- Equation name is 'pout22', type is output 
pout22   =  _LC8_B4;

-- Node name is 'pout23' 
-- Equation name is 'pout23', type is output 
pout23   =  _LC1_B4;

-- Node name is 'pout30' 
-- Equation name is 'pout30', type is output 
pout30   =  _LC5_A7;

-- Node name is 'pout31' 
-- Equation name is 'pout31', type is output 
pout31   =  _LC3_A7;

-- Node name is 'pout32' 
-- Equation name is 'pout32', type is output 
pout32   =  _LC1_C18;

-- Node name is 'pout33' 
-- Equation name is 'pout33', type is output 
pout33   =  _LC6_C18;

-- Node name is 'pout40' 
-- Equation name is 'pout40', type is output 
pout40   =  _LC1_A7;

-- Node name is 'pout41' 
-- Equation name is 'pout41', type is output 
pout41   =  _LC7_A7;

-- Node name is 'pout42' 
-- Equation name is 'pout42', type is output 
pout42   =  _LC4_A7;

-- Node name is 'pout43' 
-- Equation name is 'pout43', type is output 
pout43   =  _LC8_A7;

-- Node name is ':230' 
-- Equation name is '_LC4_B1', type is buried 
_LC4_B1  = LCELL( _EQ001);
  _EQ001 = !flag2 &  _LC2_B1
         #  flag2 &  sec13;

-- Node name is ':236' 
-- Equation name is '_LC2_B1', type is buried 
_LC2_B1  = LCELL( _EQ002);
  _EQ002 = !flag1 &  _LC4_B1
         #  flag1 &  price13;

-- Node name is ':242' 
-- Equation name is '_LC3_B1', type is buried 
_LC3_B1  = LCELL( _EQ003);
  _EQ003 = !flag2 &  _LC1_B1
         #  flag2 &  sec12;

-- Node name is ':245' 
-- Equation name is '_LC1_B1', type is buried 
_LC1_B1  = LCELL( _EQ004);
  _EQ004 = !flag1 &  _LC3_B1
         #  flag1 &  price12;

-- Node name is ':251' 
-- Equation name is '_LC7_B4', type is buried 
_LC7_B4  = LCELL( _EQ005);
  _EQ005 = !flag2 &  _LC6_B4
         #  flag2 &  sec11;

-- Node name is ':254' 
-- Equation name is '_LC6_B4', type is buried 
_LC6_B4  = LCELL( _EQ006);
  _EQ006 = !flag1 &  _LC7_B4
         #  flag1 &  price11;

-- Node name is ':260' 
-- Equation name is '_LC5_B4', type is buried 
_LC5_B4  = LCELL( _EQ007);
  _EQ007 = !flag2 &  _LC4_B4
         #  flag2 &  sec10;

-- Node name is ':263' 
-- Equation name is '_LC4_B4', type is buried 
_LC4_B4  = LCELL( _EQ008);
  _EQ008 = !flag1 &  _LC5_B4
         #  flag1 &  price10;

-- Node name is ':269' 
-- Equation name is '_LC3_B4', type is buried 
_LC3_B4  = LCELL( _EQ009);
  _EQ009 = !flag2 &  _LC1_B4
         #  flag2 &  sec23;

-- Node name is ':272' 
-- Equation name is '_LC1_B4', type is buried 
_LC1_B4  = LCELL( _EQ010);
  _EQ010 = !flag1 &  _LC3_B4
         #  flag1 &  price23;

-- Node name is ':278' 
-- Equation name is '_LC2_B4', type is buried 
_LC2_B4  = LCELL( _EQ011);
  _EQ011 = !flag2 &  _LC8_B4
         #  flag2 &  sec22;

-- Node name is ':281' 
-- Equation name is '_LC8_B4', type is buried 
_LC8_B4  = LCELL( _EQ012);
  _EQ012 = !flag1 &  _LC2_B4
         #  flag1 &  price22;

-- Node name is ':287' 
-- Equation name is '_LC8_C18', type is buried 
_LC8_C18 = LCELL( _EQ013);
  _EQ013 = !flag2 &  _LC2_C18
         #  flag2 &  sec21;

-- Node name is ':290' 
-- Equation name is '_LC2_C18', type is buried 
_LC2_C18 = LCELL( _EQ014);
  _EQ014 = !flag1 &  _LC8_C18
         #  flag1 &  price21;

-- Node name is ':296' 
-- Equation name is '_LC7_C18', type is buried 
_LC7_C18 = LCELL( _EQ015);
  _EQ015 = !flag2 &  _LC5_C18
         #  flag2 &  sec20;

-- Node name is ':299' 
-- Equation name is '_LC5_C18', type is buried 
_LC5_C18 = LCELL( _EQ016);
  _EQ016 = !flag1 &  _LC7_C18
         #  flag1 &  price20;

-- Node name is ':305' 
-- Equation name is '_LC4_C18', type is buried 
_LC4_C18 = LCELL( _EQ017);
  _EQ017 = !flag2 &  _LC6_C18
         #  flag2 &  hour13;

-- Node name is ':308' 
-- Equation name is '_LC6_C18', type is buried 
_LC6_C18 = LCELL( _EQ018);
  _EQ018 = !flag1 &  _LC4_C18
         #  flag1 &  price33;

-- Node name is ':314' 
-- Equation name is '_LC3_C18', type is buried 
_LC3_C18 = LCELL( _EQ019);
  _EQ019 = !flag2 &  _LC1_C18
         #  flag2 &  hour12;

-- Node name is ':317' 
-- Equation name is '_LC1_C18', type is buried 
_LC1_C18 = LCELL( _EQ020);
  _EQ020 = !flag1 &  _LC3_C18
         #  flag1 &  price32;

-- Node name is ':323' 
-- Equation name is '_LC6_A7', type is buried 
_LC6_A7  = LCELL( _EQ021);
  _EQ021 = !flag2 &  _LC3_A7
         #  flag2 &  hour11;

-- Node name is ':326' 
-- Equation name is '_LC3_A7', type is buried 
_LC3_A7  = LCELL( _EQ022);
  _EQ022 = !flag1 &  _LC6_A7
         #  flag1 &  price31;

-- Node name is ':332' 
-- Equation name is '_LC2_A7', type is buried 
_LC2_A7  = LCELL( _EQ023);
  _EQ023 = !flag2 &  _LC5_A7
         #  flag2 &  hour10;

-- Node name is ':335' 
-- Equation name is '_LC5_A7', type is buried 
_LC5_A7  = LCELL( _EQ024);
  _EQ024 = !flag1 &  _LC2_A7
         #  flag1 &  price30;

-- Node name is ':344' 
-- Equation name is '_LC8_A7', type is buried 
_LC8_A7  = LCELL( _EQ025);
  _EQ025 = !flag1 & !flag2 &  _LC8_A7
         # !flag1 &  flag2 &  hour23;

-- Node name is ':353' 
-- Equation name is '_LC4_A7', type is buried 
_LC4_A7  = LCELL( _EQ026);
  _EQ026 = !flag1 & !flag2 &  _LC4_A7
         # !flag1 &  flag2 &  hour22;

-- Node name is ':362' 
-- Equation name is '_LC7_A7', type is buried 
_LC7_A7  = LCELL( _EQ027);
  _EQ027 = !flag1 & !flag2 &  _LC7_A7
         # !flag1 &  flag2 &  hour21;

-- Node name is ':371' 
-- Equation name is '_LC1_A7', type is buried 
_LC1_A7  = LCELL( _EQ028);
  _EQ028 = !flag1 & !flag2 &  _LC1_A7
         # !flag1 &  flag2 &  hour20;



Project Information                                        e:\eda\display1.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:01


Memory Allocated
-----------------

Peak memory allocated during compilation  = 11,870K