xor_mul.map.eqn

使用列表法

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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--A1L77Q is product[0]~reg0
--operation mode is normal

A1L77Q_lut_out = m[0];
A1L77Q = DFFEAS(A1L77Q_lut_out, clk, VCC, , , , , , );


--A1L97Q is product[1]~reg0
--operation mode is normal

A1L97Q_lut_out = m[1];
A1L97Q = DFFEAS(A1L97Q_lut_out, clk, VCC, , , , , , );


--A1L18Q is product[2]~reg0
--operation mode is normal

A1L18Q_lut_out = m[2];
A1L18Q = DFFEAS(A1L18Q_lut_out, clk, VCC, , , , , , );


--A1L38Q is product[3]~reg0
--operation mode is normal

A1L38Q_lut_out = m[3];
A1L38Q = DFFEAS(A1L38Q_lut_out, clk, VCC, , , , , , );


--A1L58Q is product[4]~reg0
--operation mode is normal

A1L58Q_lut_out = m[4];
A1L58Q = DFFEAS(A1L58Q_lut_out, clk, VCC, , , , , , );


--A1L78Q is product[5]~reg0
--operation mode is normal

A1L78Q_lut_out = m[5];
A1L78Q = DFFEAS(A1L78Q_lut_out, clk, VCC, , , , , , );


--A1L98Q is product[6]~reg0
--operation mode is normal

A1L98Q_lut_out = m[6];
A1L98Q = DFFEAS(A1L98Q_lut_out, clk, VCC, , , , , , );


--A1L19Q is product[7]~reg0
--operation mode is normal

A1L19Q_lut_out = m[7];
A1L19Q = DFFEAS(A1L19Q_lut_out, clk, VCC, , , , , , );


--m[0] is m[0]
--operation mode is normal

m[0]_lut_out = c[13] $ c[12] $ c[8] $ c[0];
m[0] = DFFEAS(m[0]_lut_out, clk, VCC, , , , , , );


--m[1] is m[1]
--operation mode is normal

m[1]_lut_out = c[12] $ c[1] $ A1L37;
m[1] = DFFEAS(m[1]_lut_out, clk, VCC, , , , , , );


--m[2] is m[2]
--operation mode is normal

m[2]_lut_out = c[13] $ c[9] $ c[10] $ c[2];
m[2] = DFFEAS(m[2]_lut_out, clk, VCC, , , , , , );


--m[3] is m[3]
--operation mode is normal

m[3]_lut_out = c[12] $ c[14] $ A1L47 $ c[3];
m[3] = DFFEAS(m[3]_lut_out, clk, VCC, , , , , , );


--m[4] is m[4]
--operation mode is normal

m[4]_lut_out = A1L37 $ c[11] $ c[4];
m[4] = DFFEAS(m[4]_lut_out, clk, VCC, , , , , , );


--m[5] is m[5]
--operation mode is normal

m[5]_lut_out = c[12] $ c[9] $ c[10] $ c[5];
m[5] = DFFEAS(m[5]_lut_out, clk, VCC, , , , , , );


--m[6] is m[6]
--operation mode is normal

m[6]_lut_out = c[13] $ c[10] $ c[11] $ c[6];
m[6] = DFFEAS(m[6]_lut_out, clk, VCC, , , , , , );


--m[7] is m[7]
--operation mode is normal

m[7]_lut_out = c[12] $ c[14] $ c[11] $ c[7];
m[7] = DFFEAS(m[7]_lut_out, clk, VCC, , , , , , );


--c[13] is c[13]
--operation mode is normal

c[13]_lut_out = b[6] & (a[7] $ (b[7] & a[6])) # !b[6] & b[7] & a[6];
c[13] = DFFEAS(c[13]_lut_out, clk, VCC, , , , , , );


--c[12] is c[12]
--operation mode is normal

c[12]_lut_out = A1L04 $ (a[7] & b[5]);
c[12] = DFFEAS(c[12]_lut_out, clk, VCC, , , , , , );


--c[8] is c[8]
--operation mode is normal

c[8]_lut_out = A1L14 $ A1L24 $ A1L34 $ A1L73;
c[8] = DFFEAS(c[8]_lut_out, clk, VCC, , , , , , );


--c[0] is c[0]
--operation mode is normal

c[0]_lut_out = b[0] & a[0];
c[0] = DFFEAS(c[0]_lut_out, clk, VCC, , , , , , );


--c[1] is c[1]
--operation mode is normal

c[1]_lut_out = b[1] & (a[0] $ (a[1] & b[0])) # !b[1] & a[1] & b[0];
c[1] = DFFEAS(c[1]_lut_out, clk, VCC, , , , , , );


--c[14] is c[14]
--operation mode is normal

c[14]_lut_out = a[7] & b[7];
c[14] = DFFEAS(c[14]_lut_out, clk, VCC, , , , , , );


--c[9] is c[9]
--operation mode is normal

c[9]_lut_out = A1L44 $ A1L54 $ A1L64;
c[9] = DFFEAS(c[9]_lut_out, clk, VCC, , , , , , );


--A1L37 is m~161
--operation mode is normal

A1L37 = c[8] $ c[14] $ c[9];


--c[10] is c[10]
--operation mode is normal

c[10]_lut_out = A1L74 $ A1L84 $ (a[7] & b[3]);
c[10] = DFFEAS(c[10]_lut_out, clk, VCC, , , , , , );


--c[2] is c[2]
--operation mode is normal

c[2]_lut_out = A1L94 $ (a[2] & b[0]);
c[2] = DFFEAS(c[2]_lut_out, clk, VCC, , , , , , );


--c[11] is c[11]
--operation mode is normal

c[11]_lut_out = A1L63 $ A1L05 $ (b[6] & a[5]);
c[11] = DFFEAS(c[11]_lut_out, clk, VCC, , , , , , );


--A1L47 is m~163
--operation mode is normal

A1L47 = c[13] $ c[8] $ c[10] $ c[11];


--c[3] is c[3]
--operation mode is normal

c[3]_lut_out = A1L93 $ A1L15 $ (a[1] & b[2]);
c[3] = DFFEAS(c[3]_lut_out, clk, VCC, , , , , , );


--c[4] is c[4]
--operation mode is normal

c[4]_lut_out = A1L25 $ A1L35 $ (a[4] & b[0]);
c[4] = DFFEAS(c[4]_lut_out, clk, VCC, , , , , , );


--c[5] is c[5]
--operation mode is normal

c[5]_lut_out = A1L45 $ A1L55 $ A1L65;
c[5] = DFFEAS(c[5]_lut_out, clk, VCC, , , , , , );


--c[6] is c[6]
--operation mode is normal

c[6]_lut_out = A1L75 $ A1L85 $ A1L95 $ A1L83;
c[6] = DFFEAS(c[6]_lut_out, clk, VCC, , , , , , );


--c[7] is c[7]
--operation mode is normal

c[7]_lut_out = A1L06 $ A1L16 $ A1L26 $ A1L36;
c[7] = DFFEAS(c[7]_lut_out, clk, VCC, , , , , , );


--A1L04 is c~818
--operation mode is normal

A1L04 = b[6] & (a[6] $ (b[7] & a[5])) # !b[6] & b[7] & a[5];


--A1L14 is c~819
--operation mode is normal

A1L14 = a[5] & (b[3] $ (b[4] & a[4])) # !a[5] & b[4] & a[4];


--A1L24 is c~820
--operation mode is normal

A1L24 = a[7] & (b[1] $ (b[7] & a[1])) # !a[7] & b[7] & a[1];


--A1L34 is c~821
--operation mode is normal

A1L34 = b[6] & (a[2] $ (a[6] & b[2])) # !b[6] & a[6] & b[2];


--A1L73 is c~43
--operation mode is normal

A1L73 = b[5] & a[3];


--A1L44 is c~823
--operation mode is normal

A1L44 = a[6] & (b[3] $ (b[5] & a[4])) # !a[6] & b[5] & a[4];


--A1L54 is c~824
--operation mode is normal

A1L54 = b[6] & (a[3] $ (b[7] & a[2])) # !b[6] & b[7] & a[2];


--A1L64 is c~825
--operation mode is normal

A1L64 = a[7] & (b[2] $ (a[5] & b[4])) # !a[7] & a[5] & b[4];


--A1L74 is c~827
--operation mode is normal

A1L74 = a[6] & (b[4] $ (a[5] & b[5])) # !a[6] & a[5] & b[5];


--A1L84 is c~828
--operation mode is normal

A1L84 = b[6] & (a[4] $ (b[7] & a[3])) # !b[6] & b[7] & a[3];


--A1L94 is c~830
--operation mode is normal

A1L94 = b[1] & (a[1] $ (b[2] & a[0])) # !b[1] & b[2] & a[0];


--A1L63 is c~10
--operation mode is normal

A1L63 = a[6] & b[5];


--A1L05 is c~831
--operation mode is normal

A1L05 = a[7] & (b[4] $ (b[7] & a[4])) # !a[7] & b[7] & a[4];


--A1L93 is c~98
--operation mode is normal

A1L93 = b[1] & a[2];


--A1L15 is c~832
--operation mode is normal

A1L15 = b[3] & (a[0] $ (a[3] & b[0])) # !b[3] & a[3] & b[0];


--A1L25 is c~833
--operation mode is normal

A1L25 = b[1] & (a[3] $ (a[2] & b[2])) # !b[1] & a[2] & b[2];


--A1L35 is c~834
--operation mode is normal

A1L35 = b[3] & (a[1] $ (b[4] & a[0])) # !b[3] & b[4] & a[0];


--A1L45 is c~836
--operation mode is normal

A1L45 = b[3] & (a[2] $ (a[4] & b[1])) # !b[3] & a[4] & b[1];


--A1L55 is c~837
--operation mode is normal

A1L55 = b[5] & (a[0] $ (b[4] & a[1])) # !b[5] & b[4] & a[1];


--A1L65 is c~838
--operation mode is normal

A1L65 = a[5] & (b[0] $ (b[2] & a[3])) # !a[5] & b[2] & a[3];


--A1L75 is c~840
--operation mode is normal

A1L75 = b[3] & (a[3] $ (a[4] & b[2])) # !b[3] & a[4] & b[2];


--A1L85 is c~841
--operation mode is normal

A1L85 = b[6] & (a[0] $ (a[6] & b[0])) # !b[6] & a[6] & b[0];


--A1L95 is c~842
--operation mode is normal

A1L95 = a[5] & (b[1] $ (b[5] & a[1])) # !a[5] & b[5] & a[1];


--A1L83 is c~71
--operation mode is normal

A1L83 = b[4] & a[2];


--A1L06 is c~844
--operation mode is normal

A1L06 = b[6] & (a[1] $ (a[6] & b[1])) # !b[6] & a[6] & b[1];


--A1L16 is c~845
--operation mode is normal

A1L16 = b[7] & (a[0] $ (a[5] & b[2])) # !b[7] & a[5] & b[2];


--A1L26 is c~846
--operation mode is normal

A1L26 = b[3] & (a[4] $ (b[4] & a[3])) # !b[3] & b[4] & a[3];


--A1L36 is c~847
--operation mode is normal

A1L36 = a[7] & (b[0] $ (b[5] & a[2])) # !a[7] & b[5] & a[2];


--clk is clk
--operation mode is input

clk = INPUT();


--b[6] is b[6]
--operation mode is input

b[6] = INPUT();


--b[7] is b[7]
--operation mode is input

b[7] = INPUT();


--a[6] is a[6]
--operation mode is input

a[6] = INPUT();


--a[7] is a[7]
--operation mode is input

a[7] = INPUT();


--a[5] is a[5]
--operation mode is input

a[5] = INPUT();


--b[5] is b[5]
--operation mode is input

b[5] = INPUT();


--b[4] is b[4]
--operation mode is input

b[4] = INPUT();


--a[4] is a[4]
--operation mode is input

a[4] = INPUT();


--b[3] is b[3]
--operation mode is input

b[3] = INPUT();


--a[1] is a[1]
--operation mode is input

a[1] = INPUT();


--b[1] is b[1]
--operation mode is input

b[1] = INPUT();


--b[2] is b[2]
--operation mode is input

b[2] = INPUT();


--a[2] is a[2]
--operation mode is input

a[2] = INPUT();


--a[3] is a[3]
--operation mode is input

a[3] = INPUT();


--b[0] is b[0]
--operation mode is input

b[0] = INPUT();


--a[0] is a[0]
--operation mode is input

a[0] = INPUT();


--product[0] is product[0]
--operation mode is output

product[0] = OUTPUT(A1L77Q);


--product[1] is product[1]
--operation mode is output

product[1] = OUTPUT(A1L97Q);


--product[2] is product[2]
--operation mode is output

product[2] = OUTPUT(A1L18Q);


--product[3] is product[3]
--operation mode is output

product[3] = OUTPUT(A1L38Q);


--product[4] is product[4]
--operation mode is output

product[4] = OUTPUT(A1L58Q);


--product[5] is product[5]
--operation mode is output

product[5] = OUTPUT(A1L78Q);


--product[6] is product[6]
--operation mode is output

product[6] = OUTPUT(A1L98Q);


--product[7] is product[7]
--operation mode is output

product[7] = OUTPUT(A1L19Q);