5050pwm.vho

FPGA 实现基于ISA接口的3路编码器计数

SIGNAL \inst5|COUNTER3[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[4]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[4]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[5]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[5]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1635_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1635_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1638_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1638_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1613_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1613_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1617_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1617_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[6]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[6]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[7]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[7]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[8]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[8]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[9]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[9]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[10]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[10]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1614_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1614_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1619_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1619_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1622_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1622_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1627_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1627_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[11]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[11]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[12]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[12]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[13]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[13]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[14]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[14]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[15]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[15]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1626_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1626_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1631_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1631_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1634_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1634_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1639_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1639_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[16]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[16]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[17]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[17]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[18]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[18]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[19]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[19]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[20]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[20]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1615_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1615_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1618_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1618_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[21]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[21]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[22]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[22]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[23]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[23]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|comb~2042_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|comb~2042_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|comb~2043_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|comb~2043_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1612_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1612_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1616_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1616_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1636_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1636_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1640_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1640_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[24]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[24]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[25]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[25]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1620_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1620_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1624_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1624_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1628_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1628_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1632_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3~1632_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[26]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[26]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[27]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[27]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[28]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[28]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[29]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[29]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[30]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[30]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER3[31]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER3[31]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|comb~2044_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|comb~2044_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|comb~2045_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|comb~2045_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|comb~2046_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|comb~2046_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1577_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1577_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1582_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1582_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1601_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1601_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1606_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1606_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[24]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[24]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[25]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[25]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1585_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1585_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1590_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1590_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1593_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1593_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1598_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2~1598_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[26]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[26]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[27]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[27]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[28]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[28]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[29]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[29]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[30]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[30]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER2[31]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER2[31]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|comb~2047_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|comb~2047_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|comb~2108_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|comb~2108_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \PHA0~I_modesel\ : std_logic_vector(26 DOWNTO 0);
SIGNAL \inst1|58~153_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst1|58~153_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~52_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~52_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[1]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~53_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~53_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~54_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~54_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \PHB0~I_modesel\ : std_logic_vector(26 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[0]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[0]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|Add1~874_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|Add1~874_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER~1539_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER~1539_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~55_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB~55_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|SENSOR_AB[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \inst5|COUNTER[7]~1540_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \inst5|COUNTER[7]~1540_I_pathsel\ : std_logic_vector(10 DOWNTO 0);