cns2.fit

verilog除頻器可用於編碼段運用可以穩定電路設計

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 04/19/2007 03:22:28      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "cns2"
BEGIN

    DEVICE = "EP1K100FC484-3";

    "clk"                          : INPUT_PIN  = D12    ;
    "cq0"                          : OUTPUT_PIN = M7     ;
    "cq1"                          : OUTPUT_PIN = U7     ;
    "cq2"                          : OUTPUT_PIN = L20    ;
    "cq3"                          : OUTPUT_PIN = M8     ;
    "m1s"                          : OUTPUT_PIN = L4     ;
    ":42"                          : LOCATION   = LC7_F3 ;
    ":43"                          : LOCATION   = LC2_F3 ;
    ":44"                          : LOCATION   = LC1_F3 ;
    ":45"                          : LOCATION   = LC8_F3 ;
    ":55"                          : LOCATION   = LC3_F3 ;

END;

INTERNAL_INFO "cns2"
BEGIN
	DEVICE = EP1K100FC484-3;
    OD4PD12 : LORAX = "1:FB4->LC7_F3,->LC2_F3,->LC1_F3,->LC8_F3,->LC3_F3|";
    LC7_F3  : LORAX = "1:MSW6R5C3,HHL64R5->OH14R5PM8|";
    LC2_F3  : LORAX = "1:MSW1R5C3,G20R5->OH1R5PL20|";
    LC1_F3  : LORAX = "1:MSW0R5C2,V1C2->OV2C2PU7|";
    LC8_F3  : LORAX = "1:MSW7R5C2,HHL84R5->OH15R5PM7|";
    LC3_F3  : LORAX = "1:MSW2R5C3,G1R5->OH10R5PL4|";
	LC7_F3  : LORAX2 = "LC7_F3, LC2_F3, LC1_F3, LC8_F3";
	LC2_F3  : LORAX2 = "LC7_F3, LC2_F3, LC1_F3, LC8_F3";
	LC1_F3  : LORAX2 = "LC7_F3, LC1_F3, LC2_F3, LC8_F3";
	LC8_F3  : LORAX2 = "X, X, X, LC8_F3";
	LC3_F3  : LORAX2 = "LC7_F3, LC2_F3, LC1_F3, LC8_F3";
END;