de2_usb_api.tan.qmsg

Altera de2开发板提供的配套软件程序

{ "Info" "ITAN_NO_REG2REG_EXIST" "Multi_Sdram:u3\|Sdram_Controller:u1\|PLL1:sdram_pll1\|altpll:altpll_component\|_clk2 " "Info: No valid register-to-register data paths exist for clock \"Multi_Sdram:u3\|Sdram_Controller:u1\|PLL1:sdram_pll1\|altpll:altpll_component\|_clk2\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}
{ "Info" "ITDB_FULL_SLACK_RESULT" "VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0 memory VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|ram_block2a2~PORTADATAOUT6 register VGA_OSD_RAM:u9\|oRed\[8\] 24.231 ns " "Info: Slack time is 24.231 ns for clock \"VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0\" between source memory \"VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|ram_block2a2~PORTADATAOUT6\" and destination register \"VGA_OSD_RAM:u9\|oRed\[8\]\"" { { "Info" "ITDB_SIMPLE_FMAX_RESULT" "64.72 MHz 15.451 ns " "Info: Fmax is 64.72 MHz (period= 15.451 ns)" {  } {  } 0 0 "Fmax is %1!s! (period= %2!s!)" 0 0} { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "39.394 ns + Largest memory register " "Info: + Largest memory to register requirement is 39.394 ns" { { "Info" "ITDB_FULL_SETUP_REQUIREMENT" "39.682 ns + " "Info: + Setup relationship between source and destination is 39.682 ns" { { "Info" "ITDB_EDGE_RESULT" "+ Latch 36.892 ns " "Info: + Latch edge is 36.892 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Destination VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0 39.682 ns -2.790 ns  50 " "Info: Clock period of Destination clock \"VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0\" is 39.682 ns with  offset of -2.790 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Destination Setup 1 " "Info: Multicycle Setup factor for Destination register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0} { "Info" "ITDB_EDGE_RESULT" "- Launch -2.790 ns " "Info: - Launch edge is -2.790 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Source VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0 39.682 ns -2.790 ns  50 " "Info: Clock period of Source clock \"VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0\" is 39.682 ns with  offset of -2.790 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Source Setup 1 " "Info: Multicycle Setup factor for Source register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0}  } {  } 0 0 "%2!c! Setup relationship between source and destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.068 ns + Largest " "Info: + Largest clock skew is -0.068 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0 destination 3.225 ns + Shortest register " "Info: + Shortest clock path from clock \"VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0\" to destination register is 3.225 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0 1 CLK PLL_3 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_3; Fanout = 1; CLK Node = 'VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 } "NODE_NAME" } } { "altpll.tdf" "" { Text "i:/altera/quartus60/libraries/megafunctions/altpll.tdf" 767 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.365 ns) + CELL(0.000 ns) 1.365 ns VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0~clkctrl 2 COMB CLKCTRL_G11 1389 " "Info: 2: + IC(1.365 ns) + CELL(0.000 ns) = 1.365 ns; Loc. = CLKCTRL_G11; Fanout = 1389; COMB Node = 'VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0~clkctrl'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.365 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl } "NODE_NAME" } } { "altpll.tdf" "" { Text "i:/altera/quartus60/libraries/megafunctions/altpll.tdf" 767 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.194 ns) + CELL(0.666 ns) 3.225 ns VGA_OSD_RAM:u9\|oRed\[8\] 3 REG LCFF_X24_Y17_N31 14 " "Info: 3: + IC(1.194 ns) + CELL(0.666 ns) = 3.225 ns; Loc. = LCFF_X24_Y17_N31; Fanout = 14; REG Node = 'VGA_OSD_RAM:u9\|oRed\[8\]'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.860 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } "NODE_NAME" } } { "VGA_Controller/VGA_OSD_RAM.v" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/VGA_Controller/VGA_OSD_RAM.v" 48 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.666 ns ( 20.65 % ) " "Info: Total cell delay = 0.666 ns ( 20.65 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.559 ns ( 79.35 % ) " "Info: Total interconnect delay = 2.559 ns ( 79.35 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } { 0.000ns 1.365ns 1.194ns } { 0.000ns 0.000ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0 source 3.293 ns - Longest memory " "Info: - Longest clock path from clock \"VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0\" to source memory is 3.293 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0 1 CLK PLL_3 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_3; Fanout = 1; CLK Node = 'VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 } "NODE_NAME" } } { "altpll.tdf" "" { Text "i:/altera/quartus60/libraries/megafunctions/altpll.tdf" 767 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.365 ns) + CELL(0.000 ns) 1.365 ns VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0~clkctrl 2 COMB CLKCTRL_G11 1389 " "Info: 2: + IC(1.365 ns) + CELL(0.000 ns) = 1.365 ns; Loc. = CLKCTRL_G11; Fanout = 1389; COMB Node = 'VGA_Audio_PLL:p1\|altpll:altpll_component\|_clk0~clkctrl'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.365 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl } "NODE_NAME" } } { "altpll.tdf" "" { Text "i:/altera/quartus60/libraries/megafunctions/altpll.tdf" 767 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.113 ns) + CELL(0.815 ns) 3.293 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|ram_block2a2~PORTADATAOUT6 3 MEM M4K_X13_Y31 1 " "Info: 3: + IC(1.113 ns) + CELL(0.815 ns) = 3.293 ns; Loc. = M4K_X13_Y31; Fanout = 1; MEM Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|ram_block2a2~PORTADATAOUT6'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.928 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } "NODE_NAME" } } { "db/altsyncram_p132.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/altsyncram_p132.tdf" 137 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.815 ns ( 24.75 % ) " "Info: Total cell delay = 0.815 ns ( 24.75 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.478 ns ( 75.25 % ) " "Info: Total interconnect delay = 2.478 ns ( 75.25 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } { 0.000ns 1.365ns 1.113ns } { 0.000ns 0.000ns 0.815ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } { 0.000ns 1.365ns 1.194ns } { 0.000ns 0.000ns 0.666ns } } } { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } { 0.000ns 1.365ns 1.113ns } { 0.000ns 0.000ns 0.815ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.260 ns - " "Info: - Micro clock to output delay of source is 0.260 ns" {  } { { "db/altsyncram_p132.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/altsyncram_p132.tdf" 137 2 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns - " "Info: - Micro setup delay of destination is -0.040 ns" {  } { { "VGA_Controller/VGA_OSD_RAM.v" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/VGA_Controller/VGA_OSD_RAM.v" 48 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } { 0.000ns 1.365ns 1.194ns } { 0.000ns 0.000ns 0.666ns } } } { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } { 0.000ns 1.365ns 1.113ns } { 0.000ns 0.000ns 0.815ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! requirement is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "15.163 ns - Longest memory register " "Info: - Longest memory to register delay is 15.163 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.109 ns) 0.109 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|ram_block2a2~PORTADATAOUT6 1 MEM M4K_X13_Y31 1 " "Info: 1: + IC(0.000 ns) + CELL(0.109 ns) = 0.109 ns; Loc. = M4K_X13_Y31; Fanout = 1; MEM Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|ram_block2a2~PORTADATAOUT6'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } "NODE_NAME" } } { "db/altsyncram_p132.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/altsyncram_p132.tdf" 137 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.714 ns) + CELL(0.651 ns) 4.474 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12077w~281 2 COMB LCCOMB_X14_Y12_N14 1 " "Info: 2: + IC(3.714 ns) + CELL(0.651 ns) = 4.474 ns; Loc. = LCCOMB_X14_Y12_N14; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12077w~281'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.365 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~281 } "NODE_NAME" } } { "db/mux_hkb.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/mux_hkb.tdf" 546 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.372 ns) + CELL(0.370 ns) 5.216 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12077w~282 3 COMB LCCOMB_X14_Y12_N20 1 " "Info: 3: + IC(0.372 ns) + CELL(0.370 ns) = 5.216 ns; Loc. = LCCOMB_X14_Y12_N20; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12077w~282'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.742 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~281 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~282 } "NODE_NAME" } } { "db/mux_hkb.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/mux_hkb.tdf" 546 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.950 ns) + CELL(0.206 ns) 7.372 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12387w~515 4 COMB LCCOMB_X14_Y23_N14 1 " "Info: 4: + IC(1.950 ns) + CELL(0.206 ns) = 7.372 ns; Loc. = LCCOMB_X14_Y23_N14; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12387w~515'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.156 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~282 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~515 } "NODE_NAME" } } { "db/mux_hkb.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/mux_hkb.tdf" 574 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.366 ns) + CELL(0.624 ns) 8.362 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12387w~521 5 COMB LCCOMB_X14_Y23_N28 1 " "Info: 5: + IC(0.366 ns) + CELL(0.624 ns) = 8.362 ns; Loc. = LCCOMB_X14_Y23_N28; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|w_result12387w~521'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.990 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~515 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~521 } "NODE_NAME" } } { "db/mux_hkb.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/mux_hkb.tdf" 574 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.537 ns) + CELL(0.624 ns) 11.523 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|result_node\[6\]~7708 6 COMB LCCOMB_X24_Y17_N6 1 " "Info: 6: + IC(2.537 ns) + CELL(0.624 ns) = 11.523 ns; Loc. = LCCOMB_X24_Y17_N6; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|result_node\[6\]~7708'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.161 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~521 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7708 } "NODE_NAME" } } { "db/mux_hkb.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/mux_hkb.tdf" 29 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.398 ns) + CELL(0.651 ns) 12.572 ns VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|result_node\[6\]~7713 7 COMB LCCOMB_X24_Y17_N26 1 " "Info: 7: + IC(0.398 ns) + CELL(0.651 ns) = 12.572 ns; Loc. = LCCOMB_X24_Y17_N26; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Img_RAM:u0\|altsyncram:altsyncram_component\|altsyncram_q7o1:auto_generated\|altsyncram_p132:altsyncram1\|mux_hkb:mux5\|result_node\[6\]~7713'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.049 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7708 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7713 } "NODE_NAME" } } { "db/mux_hkb.tdf" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/db/mux_hkb.tdf" 29 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.368 ns) + CELL(0.624 ns) 13.564 ns VGA_OSD_RAM:u9\|Mux0~29 8 COMB LCCOMB_X24_Y17_N4 1 " "Info: 8: + IC(0.368 ns) + CELL(0.624 ns) = 13.564 ns; Loc. = LCCOMB_X24_Y17_N4; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Mux0~29'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.992 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7713 VGA_OSD_RAM:u9|Mux0~29 } "NODE_NAME" } } { "VGA_Controller/VGA_OSD_RAM.v" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/VGA_Controller/VGA_OSD_RAM.v" 60 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.378 ns) + CELL(0.370 ns) 14.312 ns VGA_OSD_RAM:u9\|Mux0~30 9 COMB LCCOMB_X24_Y17_N16 1 " "Info: 9: + IC(0.378 ns) + CELL(0.370 ns) = 14.312 ns; Loc. = LCCOMB_X24_Y17_N16; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Mux0~30'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.748 ns" { VGA_OSD_RAM:u9|Mux0~29 VGA_OSD_RAM:u9|Mux0~30 } "NODE_NAME" } } { "VGA_Controller/VGA_OSD_RAM.v" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/VGA_Controller/VGA_OSD_RAM.v" 60 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.377 ns) + CELL(0.366 ns) 15.055 ns VGA_OSD_RAM:u9\|Mux0~33 10 COMB LCCOMB_X24_Y17_N30 1 " "Info: 10: + IC(0.377 ns) + CELL(0.366 ns) = 15.055 ns; Loc. = LCCOMB_X24_Y17_N30; Fanout = 1; COMB Node = 'VGA_OSD_RAM:u9\|Mux0~33'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.743 ns" { VGA_OSD_RAM:u9|Mux0~30 VGA_OSD_RAM:u9|Mux0~33 } "NODE_NAME" } } { "VGA_Controller/VGA_OSD_RAM.v" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/VGA_Controller/VGA_OSD_RAM.v" 60 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 15.163 ns VGA_OSD_RAM:u9\|oRed\[8\] 11 REG LCFF_X24_Y17_N31 14 " "Info: 11: + IC(0.000 ns) + CELL(0.108 ns) = 15.163 ns; Loc. = LCFF_X24_Y17_N31; Fanout = 14; REG Node = 'VGA_OSD_RAM:u9\|oRed\[8\]'" {  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.108 ns" { VGA_OSD_RAM:u9|Mux0~33 VGA_OSD_RAM:u9|oRed[8] } "NODE_NAME" } } { "VGA_Controller/VGA_OSD_RAM.v" "" { Text "E:/chenjian/altera_de2_system/DE2_demonstrations/DE2_USB_API/HW/VGA_Controller/VGA_OSD_RAM.v" 48 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.703 ns ( 31.02 % ) " "Info: Total cell delay = 4.703 ns ( 31.02 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.460 ns ( 68.98 % ) " "Info: Total interconnect delay = 10.460 ns ( 68.98 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "15.163 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~281 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~282 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~515 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~521 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7708 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7713 VGA_OSD_RAM:u9|Mux0~29 VGA_OSD_RAM:u9|Mux0~30 VGA_OSD_RAM:u9|Mux0~33 VGA_OSD_RAM:u9|oRed[8] } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "15.163 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~281 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12077w~282 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~515 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|w_result12387w~521 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7708 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|mux_hkb:mux5|result_node[6]~7713 VGA_OSD_RAM:u9|Mux0~29 VGA_OSD_RAM:u9|Mux0~30 VGA_OSD_RAM:u9|Mux0~33 VGA_OSD_RAM:u9|oRed[8] } { 0.000ns 3.714ns 0.372ns 1.950ns 0.366ns 2.537ns 0.398ns 0.368ns 0.378ns 0.377ns 0.000ns } { 0.109ns 0.651ns 0.370ns 0.206ns 0.624ns 0.624ns 0.651ns 0.624ns 0.370ns 0.366ns 0.108ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.225 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|oRed[8] } { 0.000ns 1.365ns 1.194ns } { 0.000ns 0.000ns 0.666ns } } } { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } "NODE_NAME" } } { "i:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "i:/altera/quartus60/win/Technology_Viewer.qrui" "3.293 ns" { VGA_Audio_PLL:p1|altpll:altpll_component|_clk0 VGA_Audio_PLL:p1|altpll:altpll_component|_clk0~clkctrl VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 } { 0.000ns 1.365ns 1.113ns } { 0.000ns 0.000ns 0.815ns } } } { "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "i:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "15.163 ns" { VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1|ram_block2a2~PORTADATAOUT6 VGA_OSD_RAM:u9|Img_RAM:u0|altsyncram:altsyncra