de2_usb_api.tan.rpt

Altera de2开发板提供的配套软件程序

Timing Analyzer report for DE2_USB_API
Sat May 17 10:32:48 2008
Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'Multi_Sdram:u3|Sdram_Controller:u1|PLL1:sdram_pll1|altpll:altpll_component|_clk0'
  6. Clock Setup: 'VGA_Audio_PLL:p1|altpll:altpll_component|_clk0'
  7. Clock Setup: 'VGA_Audio_PLL:p1|altpll:altpll_component|_clk1'
  8. Clock Setup: 'OSC_50'
  9. Clock Setup: 'TCK'
 10. Clock Hold: 'Multi_Sdram:u3|Sdram_Controller:u1|PLL1:sdram_pll1|altpll:altpll_component|_clk0'
 11. Clock Hold: 'VGA_Audio_PLL:p1|altpll:altpll_component|_clk0'
 12. Clock Hold: 'VGA_Audio_PLL:p1|altpll:altpll_component|_clk1'
 13. Clock Hold: 'OSC_50'
 14. tsu
 15. tco
 16. tpd
 17. th
 18. Timing Analyzer Messages



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; Legal Notice ;
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Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including,