h263_vld_h.asm

h263,jpeg,mpeg2编解码核心程序(TI DSP C64xx)

            .asg            A18,        A_err1      ; zz_tbl overrun flag
            .asg            A19,        A_err2      ; Invalid VLC flag
            .asg            A20,        A_zz        ; Current zz_tbl ptr
            .asg            A21,        A_bufPtr_   ; Copy of bufPtr arg.
            .asg            A22,        A_l_tmp     ; Level decode temp.
            .asg            A22,        A_run       ; Decoded run
            .asg            A23,        A_bit15     ; Constant: 1 << 15
            .asg            A24,        A_first     ; Flag:  First code
            .asg            A25,        A_last      ; Flag:  Last code
            .asg            B0,         B_dq_s      ; Delta-Q w/ sign 
            .asg            B0,         B_f5        ; First 5 bits of strm
            .asg            B0,         B_levelQ    ; Inv. Quant'd level
            .asg            B0,         B_nc1       ; Flag:  Get more bits
            .asg            B0,         B_w1_       ; Temp:  adv. bitstream
            .asg            B1,         B_w0_       ; Temp:  adv. bitstream
            .asg            B1,         B_c4        ; Flag:  f5 < 4
            .asg            B2,         B_f7        ; First 7 bits of strm
            .asg            B2,         B_nesc      ; Flag:  "Not ESC code"
            .asg            B5,         B_c32       ; Constnat:  32
            .asg            B7,         B_tab_      ; VLD Table pointer
            .asg            B9,         B_len_      ; Length Table ptr
            .asg            B16,        B_w1        ; Next word of bitstream
            .asg            B17,        B_buf       ; Stream buffer ptr.
            .asg            B18,        B_nbit      ; # of bits in this VLC
            .asg            B18,        B_sl        ; Left-shift amount
            .asg            B19,        B_idx       ; VLD table index
            .asg            B20,        B_lrl       ; Last/Run/Lvl from tbl
            .asg            B20,        B_vld_buf   ; Top 32 bits of bitstrm
            .asg            B21,        B_w0        ; Curr word of bitstream
            .asg            B22,        B_n5        ; Top 9 bits of bitstrm
            .asg            B22,        B_t_w1      ; Temp:  adv. bitstream
            .asg            B23,        B_bit       ; Current bit ptr.
* ========================================================================= *

            LDW     .D1T2   *A_bufPtr,  B_buf                 ; buffer pointer
||          MV      .L1     A_bufPtr,   A_bufPtr_

            LDW     .D2T2   *B_bitPtr,  B_bit                 ; bit pointer

            MV      .L2X    A_tab,      B_tab_                ; table pointer
||          MV      .S2     B_len,      B_len_                ; length pointer

            ADDK    .S2     352,        B_tab_                ; dcttab[176]
            ADDK    .S2     60,         B_len_                ; dctlen[60]
            LDW     .D2T2   *+B_buf[0],             B_w0      ; w0 = buf[0]
            LDW     .D2T2   *+B_buf[1],             B_w1      ; w1 = buf[1]
            MV      .S1     A_zz_in,    A_zz_end              ; End of zz array

            ADDK    .S1     63,         A_zz_end              ; zz_end = zz+63
||          SUB     .D1     A_zz_in,    A_inter,    A_zz      ; zz -= inter
||          B       .S2     L2 + 8                            ; br to prolog
||          ZERO    .L1     A_err2:A_err1

            MVKL    .S2     32,         B_c32                 ; c32 = 32

            SUB     .S2     B_c32,      B_bit,      B_sl      ; sl  = 32 - bit
||          ADDU    .L1X    A_err1,     B_c32,      A_last:A_first

            SHL     .S2     B_w0,       B_sl,       B_w0_     ; w0_ = w0 << sl
||          SHL     .S1     B_c32,      9,          A_bit15

            SHRU    .S2     B_w1,       B_bit,      B_w1_     ; w1_ = w1 >> bit
||          SHL     .S1     A_bit15,    10,         A_bit25

            OR      .S2     B_w0_,      B_w1_,      B_vld_buf ; w0_ + w1_
; Branch occurs

* =========================== PIPE LOOP KERNEL ============================ *
dectcoef_loop:
            SHL     .S2     B_w0,       B_sl,       B_w0_     ;[11,1]
||[ B_nesc] CMPLT   .L1     A_s_tmp,    0,          A_s       ;[11,1]
||[!B_c4  ] MV      .D1X    B_lrl,      A_lrl                 ;[11,1]

            ADD     .L1     A_zz,       1,          A_zz      ;[12,1]
||          ADD     .D2     B_w0_,      B_w1_,      B_vld_buf ;[12,1]
||[ B_nesc] EXTU    .S1     A_lrl,      18, 25,     A_run     ;[12,1]
||[ B_nesc] AND     .D1     A_lrl,      A_bit15,    A_last    ;[12,1]
L2:
            LDB     .D1T2   *++A_zz[A_run],         B_idx     ;[13,1]
||          EXTU    .S1     A_lrl,      25, 25,     A_l_tmp   ;[13,1]
||          SHRU    .S2     B_vld_buf,  27,         B_f5      ;[ 1,2]

            CMPGTU  .L1     A_zz,       A_zz_end,   A_err1    ;[14,1]
||[ A_s   ] NEG     .S1     A_l_tmp,    A_l_tmp               ;[14,1]
||          LDBU    .D2T2   *+B_len_[B_f5],         B_nbit    ;[ 2,2]
||          CMPLT   .L2     B_f5,       4,          B_c4      ;[ 2,2]
||          SHRU    .S2     B_vld_buf,  23,         B_n5      ;[ 2,2]
||          MV      .D1X    B_vld_buf,  A_vld_buf             ;[ 2,2]

            OR      .D1     A_err1,     A_err2,     A_err     ;[15,1]
||[ B_nesc] MV      .L1     A_l_tmp,    A_level               ;[15,1]
||          SHRU    .S1     A_vld_buf,  20,         A_idx     ;[ 3,2]
||[ B_c4  ] LDBU    .D2T2   *+B_len[B_n5],          B_nbit    ;[ 3,2]

            ADD     .D1     A_err,      A_last,     A_EOB     ;[16,1]
||          MPY     .M1     A_Q,        A_level,    A_levelQ  ;[16,1]
||          LDW     .D2T2   *+B_buf[2], B_t_w1                ;[ 4,2]
||          SHRU    .S1     A_vld_buf,  22,         A_idx_    ;[ 4,2]
||          SHRU    .S2     B_vld_buf,  25,         B_f7      ;[ 4,2]

  [!A_EOB ] B       .S1     dectcoef_loop                     ;[17,1]
||[ A_EOB ] B       .S2     B_ret                             ;[17,1] return
||[ A_s   ] ROTL    .M2     B_dq,       0,          B_dq_s    ;[17,1]
||[!A_EOB ] LDH     .D2T2   *+B_tab_[B_f7],         B_lrl     ;[ 5,2]
||[ B_f5]   ADDAW   .D1     A_idx_,     16,         A_idx     ;[ 5,2]
||[!A_EOB ] SUB     .L2     B_f7,       3,          B_nesc    ;[ 5,2]

  [!A_s   ] NEG     .S2     B_dq,       B_dq_s                ;[18,1]
||[!A_EOB ] LDH     .D1T1   *+A_tab[A_idx],         A_lrl     ;[ 6,2]

            ADD     .L2X    B_dq_s,     A_levelQ,   B_levelQ  ;[19,1]
||[!A_EOB ] AND     .S1     A_vld_buf,  A_bit25,    A_last    ;[ 7,2]
||[ A_EOB ] STW     .D2T2   B_bit,      *B_bitPtr             ; Store bit ptr
||          OR      .L1     A_first,    A_err,      A_err_
||          ZERO    .D1     A_first

  [!A_err_] STH     .D2T2   B_levelQ,   *+B_idct[B_idx]       ;[20,1]
||[!A_EOB ] SUB     .S2     B_bit,      B_nbit,     B_bit     ;[ 8,2]
||[!A_EOB ] CMPGT   .L2     B_bit,      B_nbit,     B_nc1     ;[ 8,2]
||[!A_EOB ] SUB     .L1X    B_nbit,     1,          A_tmp     ;[ 8,2]
||[!A_EOB ] EXT     .S1     A_vld_buf,  14, 24,     A_level   ;[ 8,2]
||[!A_EOB ] MV      .D1X    B_nbit,     A_nbit                ;[ 8,2]
||[ A_EOB ] ROTL    .M1     A_err,      0,          A_err_ret

  [!B_nc1 ] ADD     .S2     B_bit,      B_c32,      B_bit     ;[ 9,2]
||[!B_nc1 ] MV      .L2     B_t_w1,     B_w1                  ;[ 9,2]
||[!B_nc1 ] MV      .D2     B_w1,       B_w0                  ;[ 9,2]
||[!A_EOB ] SHL     .S1     A_vld_buf,  A_tmp,      A_s_tmp   ;[ 9,2]
||[!A_nbit] MVK     .L1     2,          A_err2                ;[ 9,2]
||[ A_EOB ] STW     .D1T2   B_buf,      *A_bufPtr_            ; Store buf ptr

  [!A_EOB ] SHRU    .S2     B_w1,       B_bit,      B_w1_     ;[10,2]
||[!A_EOB ] SUB     .L2     B_c32,      B_bit,      B_sl      ;[10,2]
||[!B_nc1 ] ADD     .D2     B_buf,      4,          B_buf     ;[10,2]
||[!A_EOB ] CMPLT   .L1     A_level,    0,          A_s       ;[10,2]
||[!A_EOB ] EXTU    .S1     A_vld_buf,  8,  26,     A_run     ;[10,2]
* ========================================================================= *

* ========================================================================= *
*   End of file:  h263_vld_h.asm                                            *
* ------------------------------------------------------------------------- *
*             Copyright (c) 2000 Texas Instruments, Incorporated.           *
*                            All Rights Reserved.                           *
* ========================================================================= *