📄 9999计数器模块 四输出.txt
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——9999计数器模块 四输出
设计要求频率计为四段显示,故计数器采用0~~9999计数,可以很好的利用数码管,以及增加频率计的精确度。模块内包含俩个进程,一为计数进程,二为时基信号控制计数模块数据输出进程。
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY counter4b IS
PORT(reset:IN STD_LOGIC; ---------复位信号输入
clk:IN STD_LOGIC; --------时钟信号输入
sig:IN STD_LOGIC; --------时基信号输入
keep1:OUT STD_LOGIC_VECTOR(3 downto 0);-------个位数
keep2:OUT STD_LOGIC_VECTOR(3 downto 0);-------十位数
keep3:OUT STD_LOGIC_VECTOR(3 downto 0);-------百位数
keep4:OUT STD_LOGIC_VECTOR(3 downto 0));------千位数
END counter4b;
ARCHITECTURE count OF counter4bit IS
SIGNAL cou1: STD_LOGIC_VECTOR(3 downto 0);
SIGNAL cou2: STD_LOGIC_VECTOR(3 downto 0);
SIGNAL cou3: STD_LOGIC_VECTOR(3 downto 0);
SIGNAL cou4: STD_LOGIC_VECTOR(3 downto 0);
BEGIN
----------计数进程
ctrcou:PROCESS(reset,clk)
BEGIN
IF reset='1'then
cou1<="0000";
cou2<="0000";
cou3<="0000";
cou4<="0000";
ELSE
IF clk'event AND clk='1'then
IF sig='1' then
IF cou4="1010"then
COU4<="1010";
ELSe
IF COU1="1001"AND COU2="1001"AND COU3="1001" AND cou4="1001"THEN
cou1<="0000";
cou2<="0000";
cou3<="0000";
cou4<="1010";
ELSIF COU1="1001"AND COU2="1001"AND COU3="1001"THEN
cou1<="0000";
cou2<="0000";
cou3<="0000";
COU4<=COU4+1;
ELSIF cou1="1001"AND cou2="1001"THEN
cou1<="0000";
cou2<="0000";
cou3<=cou3+1;
ELSIF COU1="1001"THEN
cou1<="0000";
cou2<=cou2+1;
ELSE
COU1<=COU1+1;
END IF;
end if;
ELSE
cou1<="0000";
cou2<="0000";
cou3<="0000";
cou4<="0000";
END IF;
END IF;
END IF;
END PROCESS ctrcou;;
-----------时基信号控制数据输出进程
cpuctr: process(reset,sig)
begin
if reset='1'AND sig='0'THEN
keep1<="0000";
keep2<="0000";
keep3<="0000";
keep4<="0000";
else
IF sig'EVENT AND sig='0'THEN
keep1<=cou1;
keep2<=cou2;
keep3<=cou3;
keep4<=cou4;
END IF;
END IF;
END PROCESS CPUCTR;
END ARCHITECTURE ;
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