📄 stk500i.lst
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0443 E070 LDI R23,0
0444 01FE MOVW R30,R28
0445 8022 LDD R2,Z+2
0446 8033 LDD R3,Z+3
0447 8044 LDD R4,Z+4
0448 8055 LDD R5,Z+5
0449 0E24 ADD R2,R20
044A 1E35 ADC R3,R21
044B 1E46 ADC R4,R22
044C 1E57 ADC R5,R23
044D 01FE MOVW R30,R28
044E 8222 STD Z+2,R2
044F 8233 STD Z+3,R3
0450 8244 STD Z+4,R4
0451 8255 STD Z+5,R5
(0497) }
(0498)
(0499) //increment (word) address only when we have an uneven (byte) address
(0500) if(i&1) address++;
0452 FEC0 SBRS R12,0
0453 C018 RJMP 0x046C
0454 E041 LDI R20,1
0455 E050 LDI R21,0
0456 E060 LDI R22,0
0457 E070 LDI R23,0
0458 9040006E LDS R4,address+2
045A 9050006F LDS R5,address+3
045C 9020006C LDS R2,address
045E 9030006D LDS R3,address+1
0460 0E24 ADD R2,R20
0461 1E35 ADC R3,R21
0462 1E46 ADC R4,R22
0463 1E57 ADC R5,R23
0464 9230006D STS address+1,R3
0466 9220006C STS address,R2
0468 9250006F STS address+3,R5
046A 9240006E STS address+2,R4
046C 01C6 MOVW R24,R12
046D 9601 ADIW R24,1
046E 016C MOVW R12,R24
046F 14CA CP R12,R10
0470 04DB CPC R13,R11
0471 F408 BCC 0x0473
0472 CF7B RJMP 0x03EE
(0501) }
(0502)
(0503) //If this page is complete the bit 7 of mode will be set and we programm the page
(0504) if(mode&0x80)
0473 FEE7 SBRS R14,7
0474 C077 RJMP 0x04EC
(0505) {
(0506) spi_transfer_8(msg_buffer[6]);
0475 9100007A LDS R16,0x7A
0477 D495 RCALL _spi_transfer_8
(0507) spi_transfer_16(start_address&0xFFFF);
0478 EF4F LDI R20,0xFF
0479 EF5F LDI R21,0xFF
047A E060 LDI R22,0
047B E070 LDI R23,0
047C 01FE MOVW R30,R28
047D 8026 LDD R2,Z+6
047E 8037 LDD R3,Z+7
047F 8440 LDD R4,Z+8
0480 8451 LDD R5,Z+9
0481 2224 AND R2,R20
0482 2235 AND R3,R21
0483 2246 AND R4,R22
0484 2257 AND R5,R23
0485 0181 MOVW R16,R2
0486 D48B RCALL _spi_transfer_16
(0508) spi_transfer_8(0);
0487 2700 CLR R16
0488 D484 RCALL _spi_transfer_8
(0509)
(0510) //If we have no valid polling address switch to simple wait mode
(0511) if(polling_address==0)
0489 E040 LDI R20,0
048A E050 LDI R21,0
048B E060 LDI R22,0
048C E070 LDI R23,0
048D 01FE MOVW R30,R28
048E 8022 LDD R2,Z+2
048F 8033 LDD R3,Z+3
0490 8044 LDD R4,Z+4
0491 8055 LDD R5,Z+5
0492 1624 CP R2,R20
0493 0635 CPC R3,R21
0494 0646 CPC R4,R22
0495 0657 CPC R5,R23
0496 F421 BNE 0x049B
(0512) {
(0513) mode = (mode&(~0x70)) | 0x10;
0497 2D8E MOV R24,R14
0498 788F ANDI R24,0x8F
0499 6180 ORI R24,0x10
049A 2EE8 MOV R14,R24
(0514) }
(0515)
(0516) //Different polling methods
(0517) //Hard waiting
(0518) if((mode&0x70) == 0x10)
049B 2D8E MOV R24,R14
049C 7780 ANDI R24,0x70
049D 3180 CPI R24,0x10
049E F429 BNE 0x04A4
(0519) {
(0520) wait_ms(msg_buffer[4]);
049F 91000078 LDS R16,0x78
04A1 2711 CLR R17
04A2 DBB9 RCALL _wait_ms
(0521) }
04A3 C048 RJMP 0x04EC
(0522) //Data polling
(0523) else if((mode&0x70) == 0x20)
04A4 2D8E MOV R24,R14
04A5 7780 ANDI R24,0x70
04A6 3280 CPI R24,0x20
04A7 F009 BEQ 0x04A9
04A8 C033 RJMP 0x04DC
(0524) {
(0525) do{
(0526) //If we have an uneven byte read the
(0527) //high byte
(0528) if(polling_address%2)
04A9 E041 LDI R20,1
04AA E050 LDI R21,0
04AB E060 LDI R22,0
04AC E070 LDI R23,0
04AD 01FE MOVW R30,R28
04AE 8022 LDD R2,Z+2
04AF 8033 LDD R3,Z+3
04B0 8044 LDD R4,Z+4
04B1 8055 LDD R5,Z+5
04B2 2224 AND R2,R20
04B3 2235 AND R3,R21
04B4 2246 AND R4,R22
04B5 2257 AND R5,R23
04B6 E040 LDI R20,0
04B7 E050 LDI R21,0
04B8 E060 LDI R22,0
04B9 E070 LDI R23,0
04BA 1624 CP R2,R20
04BB 0635 CPC R3,R21
04BC 0646 CPC R4,R22
04BD 0657 CPC R5,R23
04BE F029 BEQ 0x04C4
(0529) {
(0530) spi_transfer_8(msg_buffer[7]|(1<<3));
04BF 9100007B LDS R16,0x7B
04C1 6008 ORI R16,0x8
04C2 D44A RCALL _spi_transfer_8
(0531) }
04C3 C003 RJMP 0x04C7
(0532) else
(0533) {
(0534) spi_transfer_8(msg_buffer[7]);
04C4 9100007B LDS R16,0x7B
04C6 D446 RCALL _spi_transfer_8
(0535) }
(0536) spi_transfer_16(polling_address/2);
04C7 01FE MOVW R30,R28
04C8 8022 LDD R2,Z+2
04C9 8033 LDD R3,Z+3
04CA 8044 LDD R4,Z+4
04CB 8055 LDD R5,Z+5
04CC 9456 LSR R5
04CD 9447 ROR R4
04CE 9437 ROR R3
04CF 9427 ROR R2
04D0 0181 MOVW R16,R2
04D1 D440 RCALL _spi_transfer_16
(0537) tmp=spi_transfer_8(0x00);
04D2 2700 CLR R16
04D3 D439 RCALL _spi_transfer_8
04D4 870D STD Y+13,R16
(0538) }while(tmp==msg_buffer[8]);
04D5 9020007C LDS R2,0x7C
04D7 840D LDD R0,Y+13
04D8 1402 CP R0,R2
04D9 F409 BNE 0x04DB
04DA CFCE RJMP 0x04A9
(0539) }
04DB C010 RJMP 0x04EC
(0540) //RDY/BSY polling
(0541) else if((mode&0x70) == 0x40)
04DC 2D8E MOV R24,R14
04DD 7780 ANDI R24,0x70
04DE 3480 CPI R24,0x40
04DF F441 BNE 0x04E8
(0542) {
(0543) while(spi_transfer_32(0xF0000000)&1);
04E0 E000 LDI R16,0
04E1 E010 LDI R17,0
04E2 E020 LDI R18,0
04E3 EF30 LDI R19,0xF0
04E4 D439 RCALL _spi_transfer_32
04E5 FD00 SBRC R16,0
04E6 CFF9 RJMP 0x04E0
(0544) }
04E7 C004 RJMP 0x04EC
(0545) //If something was not correct with the given mode do
(0546) //hard waiting. Should never reach this point
(0547) else
(0548) {
(0549) wait_ms(msg_buffer[4]);
04E8 91000078 LDS R16,0x78
04EA 2711 CLR R17
04EB DB70 RCALL _wait_ms
(0550) }
(0551) }
(0552) }
(0553)
(0554) num_bytes = 2;
04EC E082 LDI R24,2
04ED E090 LDI R25,0
04EE 879B STD Y+11,R25
04EF 878A STD Y+10,R24
(0555) msg_buffer[0] = CMD_PROGRAM_FLASH_ISP;
04F0 E183 LDI R24,0x13
04F1 93800074 STS msg_buffer,R24
(0556) msg_buffer[1] = STATUS_CMD_OK;
04F3 2422 CLR R2
04F4 92200075 STS msg_buffer+1,R2
(0557) }
04F6 C373 RJMP 0x086A
(0558) //////////////////////////////////////
(0559) //CMD_READ_FLASH_ISP
(0560) //////////////////////////////////////
(0561) else if(cmd==CMD_READ_FLASH_ISP)
04F7 858C LDD R24,Y+12
04F8 3184 CPI R24,0x14
04F9 F009 BEQ 0x04FB
04FA C066 RJMP 0x0561
(0562) {
(0563) block_size = ((unsigned int)msg_buffer[1])<<8;
04FB 90A00075 LDS R10,msg_buffer+1
04FD 24BB CLR R11
04FE 2CBA MOV R11,R10
04FF 24AA CLR R10
(0564) block_size |= msg_buffer[2];
0500 90200076 LDS R2,msg_buffer+2
0502 2433 CLR R3
0503 28A2 OR R10,R2
0504 28B3 OR R11,R3
(0565) tmp = msg_buffer[3];
0505 90200077 LDS R2,msg_buffer+3
0507 862D STD Y+13,R2
(0566)
(0567) for(i=0;i<block_size;i++)
0508 24CC CLR R12
0509 24DD CLR R13
050A C040 RJMP 0x054B
(0568) {
(0569) //Select Low or High-Byte
(0570) if(i&1)
050B FEC0 SBRS R12,0
050C C004 RJMP 0x0511
(0571) {
(0572) spi_transfer_8(tmp|(1<<3));
050D 850D LDD R16,Y+13
050E 6008 ORI R16,0x8
050F D3FD RCALL _spi_transfer_8
(0573) }
0510 C002 RJMP 0x0513
(0574) else
(0575) {
(0576) spi_transfer_8(tmp);
0511 850D LDD R16,Y+13
0512 D3FA RCALL _spi_transfer_8
(0577) }
(0578)
(0579) spi_transfer_16(address&0xFFFF);
0513 EF4F LDI R20,0xFF
0514 EF5F LDI R21,0xFF
0515 E060 LDI R22,0
0516 E070 LDI R23,0
0517 9040006E LDS R4,address+2
0519 9050006F LDS R5,address+3
051B 9020006C LDS R2,address
051D 9030006D LDS R3,address+1
051F 2224 AND R2,R20
0520 2235 AND R3,R21
0521 2246 AND R4,R22
0522 2257 AND R5,R23
0523 0181 MOVW R16,R2
0524 D3ED RCALL _spi_transfer_16
(0580) msg_buffer[i+2] = spi_transfer_8(0);
0525 2700 CLR R16
0526 D3E6 RCALL _spi_transfer_8
0527 E784 LDI R24,0x74
0528 E090 LDI R25,0
0529 01F6 MOVW R30,R12
052A 9632 ADIW R30,2
052B 0FE8 ADD R30,R24
052C 1FF9 ADC R31,R25
052D 8300 STD Z+0,R16
(0581)
(0582) //increment (word) address only when we have an uneven (byte) address
(0583) if(i&1) address++;
052E FEC0 SBRS R12,0
052F C018 RJMP 0x0548
0530 E041 LDI R20,1
0531 E050 LDI R21,0
0532 E060 LDI R22,0
0533 E070 LDI R23,0
0534 9040006E LDS R4,address+2
0536 9050006F LDS R5,address+3
0538 9020006C LDS R2,address
053A 9030006D LDS R3,address+1
053C 0E24 ADD R2,R20
053D 1E35 ADC R3,R21
053E 1E46 ADC R4,R22
053F 1E57 ADC R5,R23
0540 9230006D STS address+1,R3
0542 9220006C STS address,R2
0544 9250006F STS address+3,R5
0546 9240006E STS address+2,R4
0548 01C6 MOVW R24,R12
0549 9601 ADIW R24,1
054A 016C MOVW R12,R24
054B 14CA CP R12,R10
054C 04DB CPC R13,R11
054D F408 BCC 0x054F
054E CFBC RJMP 0x050B
(0584) }
(0585)
(0586) num_bytes = block_size+3;
054F 01C5 MOVW R24,R10
0550 9603 ADIW R24,3
0551 879B STD Y+11,R25
0552 878A STD Y+10,R24
(0587) msg_buffer[0] = CMD_READ_FLASH_ISP;
0553 E184 LDI R24,0x14
0554 93800074 STS msg_buffer,R24
(0588) msg_buffer[1] = STATUS_CMD_OK;
0556 2422 CLR R2
0557 92200075 STS msg_buffer+1,R2
(0589) msg_buffer[block_size+2] = STATUS_CMD_OK;
0559 E784 LDI R24,0x74
055A E090 LDI R25,0
055B 01F5 MOVW R30,R10
055C 9632 ADIW R30,2
055D 0FE8 ADD R30,R24
055E 1FF9 ADC R31,R25
055F 8220 STD Z+0,R2
(0590) }
0560 C309 RJMP 0x086A
(0591) //////////////////////////////////////
(0592) //CMD_PROGRAM_EEPROM_ISP
(0593) //////////////////////////////////////
(0594) else if(cmd==CMD_PROGRAM_EEPROM_ISP)
0561 858C LDD R24,Y+12
0562 3185 CPI R24,0x15
0563 F009 BEQ 0x0565
0564 C174 RJMP 0x06D9
(0595) {
(0596) block_size = ((unsigned int)msg_buffer[1])<<8;
0565 90A00075 LDS R10,msg_buffer+1
0567 24BB CLR R11
0568 2CBA MOV R11,R10
0569 24AA CLR R10
(0597) block_size |= msg_buffer[2];
056A 90200076 LDS R2,msg_buffer+2
056C 2433 CLR R3
056D 28A2 OR R10,R2
056E 28B3 OR R11,R3
(0598) mode = msg_buffer[3];
056F 90E00077 LDS R14,msg_buffer+3
(0599)
(0600) //Byte Mode
(0601) if((mode&1) == 0)
0571 FCE0 SBRC R14,0
0572 C09B RJMP 0x060E
(0602) {
(0603) for(i=0;i<block_size;i++)
0573 24CC CLR R12
0574 24DD CLR R13
0575 C093 RJMP 0x0609
(0604) {
(0605) spi_transfer_8(msg_buffer[5]);
0576 91000079 LDS R16,0x79
0578 D394 RCALL _spi_transfer_8
(0606) spi_transfer_16(address&0xFFFF);
0579 EF4F LDI R20,0xFF
057A EF5F LDI R21,0xFF
057B E060 LDI R22,0
057C E070 LDI R23,0
057D 9040006E LDS R4,address+2
057F 9050006F LDS R5,address+3
0581 9020006C LDS R2,address
0583 9030006D LDS R3,address+1
0585 2224 AND R2,R20
0586 2235 AND R3,R21
0587 2246 AND R4,R22
0588 2257 AND R5,R23
0589 0181 MOVW R16,R2
058A D387 RCALL _spi_transfer_16
(0607) spi_transfer_8(msg_buffer[i+10]);
058B E784 LDI R24,0x74
058C E090 LDI R25,0
058D 01F6 MOVW R30,R12
058E 963A ADIW R30,0xA
058F 0FE8 ADD R30,R24
0590 1FF9 ADC R31,R25
0591 8100 LDD R16,Z+0
0592 D37A RCALL _spi_transfer_8
(0608)
(0609) //Check if we can do polling
(0610) if((msg_buffer[i+10]!=msg_buffer[8])&&(msg_buffer[i+10]!=msg_buffer[9]))
0593 E784 LDI R24,0x74
0594 E090 LDI R25,0
0595 01F6 MOVW R30,R12
0596 963A ADIW R30,0xA
0597 0FE8 ADD R30,R24
0598 1FF9 ADC R31,R25
0599 8020 LDD R2,Z+0
059A 2433 CLR R3
059B 9040007C LDS R4,0x7C
059D 1424 CP R2,R4
059E F0D1 BEQ 0x05B9
059F 9040007D LDS R4,0x7D
05A1 1424 CP R2,R4
05A2 F0B1 ⌨️ 快捷键说明
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