pstxnet.dat

基于SIIGX的PCIe的Kit

NET_NAME
'PCIE_LED_X8'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):PCIE_LED_X8':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):pcie_led_x8';
NODE_NAME	U10 AM13
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'B7_IO24':;
NODE_NAME	D29 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'CATHODE':;
NET_NAME
'HSMA_RX_P5'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMA_RX_P5':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsma_rx_p5';
NODE_NAME	U10 L1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'GXB_RX4P':;
NODE_NAME	J1 10
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '10':;
NET_NAME
'SFP_REFCLK_CN'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):SFP_REFCLK_CN':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):sfp_refclk_cn';
NODE_NAME	C468 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	R179 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	U10 P8
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'REFCLK0_B14N':;
NET_NAME
'HSMB_D0'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_D0':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_d0';
NODE_NAME	U10 AR22
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'PLL12_OUT1N':;
NODE_NAME	J2 41
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '41':;
NET_NAME
'12V'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):12V':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):\12v\';
NODE_NAME	J9 B1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_BRACKET_X8.NORMAL(CHIPS)':
 '+12V#B1':;
NODE_NAME	J9 B2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_BRACKET_X8.NORMAL(CHIPS)':
 '+12V#B2':;
NODE_NAME	J9 B3
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_BRACKET_X8.NORMAL(CHIPS)':
 '+12V#B3':;
NODE_NAME	J9 A2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_BRACKET_X8.NORMAL(CHIPS)':
 '+12V#A2':;
NODE_NAME	J9 A3
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_BRACKET_X8.NORMAL(CHIPS)':
 '+12V#A3':;
NODE_NAME	C521 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	C522 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	C523 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	C501 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	C502 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	C65 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	C334 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS37985090@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	U17 11
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'SENSE2_N':;
NODE_NAME	R100 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	R25 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	C188 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C446 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C58 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C49 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS37984036@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C449 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS37984563@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C333 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS37985617@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C470 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS37986144@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C461 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS37986671@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C160 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS37987198@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C22 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38128184@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R68 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	J8 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]2_MLX_22_23_2021.NORMAL(CHIPS)':
 '1':;
NODE_NAME	R113 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	U12 8
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'TRACK':;
NODE_NAME	U12 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'VIN':;
NODE_NAME	U9 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'VIN':;
NODE_NAME	U14 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'VIN':;
NODE_NAME	C471 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38407299@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C159 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C423 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C498 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C460 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C368 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38422939@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C303 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38422931@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C150 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38441079@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C189 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38441071@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C335 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38441057@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C422 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38407291@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	J2 52
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#52':;
NODE_NAME	J2 46
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#46':;
NODE_NAME	J2 64
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#64':;
NODE_NAME	J2 58
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#58':;
NODE_NAME	J2 76
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#76':;
NODE_NAME	J2 70
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#70':;
NODE_NAME	J2 82
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#82':;
NODE_NAME	J2 88
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#88':;
NODE_NAME	J2 94
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#94':;
NODE_NAME	J2 100
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#100':;
NODE_NAME	J2 106
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#106':;
NODE_NAME	J2 112
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#112':;
NODE_NAME	J2 118
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#118':;
NODE_NAME	J2 124
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#124':;
NODE_NAME	J2 130
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#130':;
NODE_NAME	J2 136
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#136':;
NODE_NAME	J2 142
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#142':;
NODE_NAME	J2 148
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#148':;
NODE_NAME	J2 154
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#154':;
NODE_NAME	J1 46
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#46':;
NODE_NAME	J1 52
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#52':;
NODE_NAME	J1 58
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#58':;
NODE_NAME	J1 64
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#64':;
NODE_NAME	J1 70
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#70':;
NODE_NAME	J1 76
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#76':;
NODE_NAME	J1 82
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#82':;
NODE_NAME	J1 88
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#88':;
NODE_NAME	J1 94
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#94':;
NODE_NAME	J1 100
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#100':;
NODE_NAME	J1 106
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#106':;
NODE_NAME	J1 112
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#112':;
NODE_NAME	J1 118
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#118':;
NODE_NAME	J1 124
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#124':;
NODE_NAME	J1 130
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#130':;
NODE_NAME	J1 136
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#136':;
NODE_NAME	J1 142
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#142':;
NODE_NAME	J1 148
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#148':;
NODE_NAME	J1 154
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '12V#154':;
NODE_NAME	C57 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C131 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	C472 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38067930@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NODE_NAME	C51 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38067938@STRATIX_MEM2_7.CAP_SMD_POL_3.NORMAL(CHIPS)':
 '1':;
NET_NAME
'HSMB_TX_D_P0'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_D_P0':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_d_p0';
NODE_NAME	U10 AA33
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX19P':;
NODE_NAME	J2 47
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '47':;
NET_NAME
'HSMA_TX_D_N9'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMA_TX_D_N9':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsma_tx_d_n9';
NODE_NAME	U10 K33
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX54N':;
NODE_NAME	J1 109
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '109':;
NET_NAME
'PCIE_LED_X4'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):PCIE_LED_X4':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):pcie_led_x4';
NODE_NAME	U10 AG16
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'B7_IO5':;
NODE_NAME	D28 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'CATHODE':;
NET_NAME
'DDR2_DQ71'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):DDR2_DQ71':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):ddr2_dq71';
NODE_NAME	U10 AW37
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DQ17B3':;
NODE_NAME	U2 B1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]47H32M8BP_0.NORMAL(CHIPS)':
 'DQ7':;
NODE_NAME	RN2 8
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_PACK_8.NORMAL(CHIPS)':
 '1':;
NET_NAME
'HSMA_RX_N4'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMA_RX_N4':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsma_rx_n4';
NODE_NAME	U10 J2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'GXB_RX5N':;
NODE_NAME	J1 16
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '16':;
NET_NAME
'HSMB_D3'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_D3':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_d3';
NODE_NAME	U10 AP22
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'PLL12_FBP/OUT2P':;
NODE_NAME	J2 44
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '44':;
NET_NAME
'HSMB_TX_D_P9'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_D_P9':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_d_p9';
NODE_NAME	U10 AA32
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS165304