pstxnet.dat

基于SIIGX的PCIe的Kit

NET_NAME
'HSMB_TX_P0'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_P0':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_p0';
NODE_NAME	C41 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	U10 AR4
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'NC/GXB_TX16P':;
NET_NAME
'PCIE_TX_CN0'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):PCIE_TX_CN0':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):pcie_tx_cn0';
NODE_NAME	J9 A17
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_BRACKET_X8.NORMAL(CHIPS)':
 'PER0N':;
NODE_NAME	C517 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NET_NAME
'HSMB_TX_D_P7'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_D_P7':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_d_p7';
NODE_NAME	U10 AE27
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX17P':;
NODE_NAME	J2 89
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '89':;
NET_NAME
'HSMA_RX_D_N10'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMA_RX_D_N10':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsma_rx_d_n10';
NODE_NAME	U10 L39
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_RX42N':;
NODE_NAME	J1 116
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '116':;
NET_NAME
'HSMB_TX_P1'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_P1':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_p1';
NODE_NAME	C39 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	U10 AN4
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'NC/GXB_TX17P':;
NET_NAME
'100M_REFCLK_CN'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):100M_REFCLK_CN':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):\100m_refclk_cn\';
NODE_NAME	C82 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	R174 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NODE_NAME	U10 AH8
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'REFCLK0_B16N':;
NET_NAME
'N33346366'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):N33346366':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):n33346366';
NODE_NAME	R39 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	D29 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'ANODE':;
NET_NAME
'N32944654'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):N32944654':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):n32944654';
NODE_NAME	R38 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	D28 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'ANODE':;
NET_NAME
'HSMB_TX_D_N10'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_D_N10':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_d_n10';
NODE_NAME	U10 AB31
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX20N':;
NODE_NAME	J2 115
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '115':;
NET_NAME
'HSMA_RX_D_N3'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMA_RX_D_N3':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsma_rx_d_n3';
NODE_NAME	U10 M36
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_RX41N':;
NODE_NAME	J1 68
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '68':;
NET_NAME
'DDR2_BA2'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):DDR2_BA2':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):ddr2_ba2';
NODE_NAME	U10 AH27
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'B8_IO10':;
NODE_NAME	U2 G1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]47H32M8BP_0.NORMAL(CHIPS)':
 'RFU1':;
NODE_NAME	U13 L1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]47H32M16CC_0AA.NORMAL(CHIPS)':
 'RFU/BA2':;
NODE_NAME	U11 L1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]47H32M16CC_0AA.NORMAL(CHIPS)':
 'RFU/BA2':;
NODE_NAME	U8 L1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]47H32M16CC_0AA.NORMAL(CHIPS)':
 'RFU/BA2':;
NODE_NAME	U5 L1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]47H32M16CC_0AA.NORMAL(CHIPS)':
 'RFU/BA2':;
NODE_NAME	RN1 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_PACK_8.NORMAL(CHIPS)':
 '1':;
NET_NAME
'HSMB_TX_N2'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_N2':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_n2';
NODE_NAME	C42 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	U10 AU5
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'NC/GXB_TX18N':;
NET_NAME
'HSMB_D2'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_D2':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_d2';
NODE_NAME	U10 AT21
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'PLL12_OUT1P':;
NODE_NAME	J2 43
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '43':;
NET_NAME
'FLASH_WPN'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):FLASH_WPN':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):flash_wpn';
NODE_NAME	U3 B4
 '@S2GXPCIE.SCHEMATIC1(SCH_1):INS38224755@S2GXPCIE.S29GLXXXN_BGA_1.NORMAL(CHIPS)':
 'WPN':;
NODE_NAME	R97 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '2':;
NET_NAME
'N32944668'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):N32944668':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):n32944668';
NODE_NAME	R40 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	D27 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'ANODE':;
NET_NAME
'HSMB_TX_D_P5'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_D_P5':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_d_p5';
NODE_NAME	U10 AB25
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX23P':;
NODE_NAME	J2 77
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '77':;
NET_NAME
'HSMA_TX_D_P0'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMA_TX_D_P0':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsma_tx_d_p0';
NODE_NAME	U10 G33
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX58P':;
NODE_NAME	J1 47
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '47':;
NET_NAME
'PCIE_LED_X1'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):PCIE_LED_X1':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):pcie_led_x1';
NODE_NAME	U10 AU11
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DQSN1B':;
NODE_NAME	D27 2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'CATHODE':;
NET_NAME
'HSMB_RX_N1'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_RX_N1':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_rx_n1';
NODE_NAME	U10 AN2
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'NC/GXB_RX17N':;
NODE_NAME	J2 28
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '28':;
NET_NAME
'XAUI_REFCLK_CP'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):XAUI_REFCLK_CP':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):xaui_refclk_cp';
NODE_NAME	C332 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	R181 1
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 '1':;
NODE_NAME	U10 H7
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'REFCLK0_B13P':;
NET_NAME
'HSMB_D1'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_D1':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_d1';
NODE_NAME	U10 AT22
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'PLL12_OUT0N':;
NODE_NAME	J2 42
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '42':;
NET_NAME
'GND_SFP'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):GND_SFP':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):gnd_sfp';
NODE_NAME	J7 33
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#33':;
NODE_NAME	J7 34
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#34':;
NODE_NAME	J7 32
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#32':;
NODE_NAME	J7 35
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#35':;
NODE_NAME	J7 36
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#36':;
NODE_NAME	J7 37
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#37':;
NODE_NAME	J7 40
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#40':;
NODE_NAME	J7 38
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#38':;
NODE_NAME	J7 39
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#39':;
NODE_NAME	J7 23
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#23':;
NODE_NAME	J7 24
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#24':;
NODE_NAME	J7 26
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#26':;
NODE_NAME	J7 27
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#27':;
NODE_NAME	J7 25
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#25':;
NODE_NAME	J7 22
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#22':;
NODE_NAME	J7 21
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#21':;
NODE_NAME	J7 31
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#31':;
NODE_NAME	J7 29
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#29':;
NODE_NAME	J7 30
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#30':;
NODE_NAME	J7 28
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#28':;
NODE_NAME	J6 37
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#37':;
NODE_NAME	J6 38
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#38':;
NODE_NAME	J6 34
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#34':;
NODE_NAME	J6 35
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#35':;
NODE_NAME	J6 36
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#36':;
NODE_NAME	J6 33
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#33':;
NODE_NAME	J6 32
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#32':;
NODE_NAME	J6 40
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#40':;
NODE_NAME	J6 39
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#39':;
NODE_NAME	J6 24
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#24':;
NODE_NAME	J6 25
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#25':;
NODE_NAME	J6 31
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#31':;
NODE_NAME	J6 22
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#22':;
NODE_NAME	J6 23
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#23':;
NODE_NAME	J6 21
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#21':;
NODE_NAME	J6 26
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#26':;
NODE_NAME	J6 27
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#27':;
NODE_NAME	J6 28
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#28':;
NODE_NAME	J6 29
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#29':;
NODE_NAME	J6 30
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]20_AND_CAGE.NORMAL(CHIPS)':
 'CAGE_GND#30':;
NET_NAME
'HSMB_TX_D_N0'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMB_TX_D_N0':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsmb_tx_d_n0';
NODE_NAME	U10 AB33
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX19N':;
NODE_NAME	J2 49
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '49':;
NET_NAME
'HSMA_TX_D_N2'
 '@S2GXPCIE.SCHEMATIC1(SCH_1):HSMA_TX_D_N2':
 C_SIGNAL='@s2gxpcie.schematic1(sch_1):hsma_tx_d_n2';
NODE_NAME	U10 K31
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail](CHIPS)':
 'DIFFIO_TX56N':;
NODE_NAME	J1 61
 '@S2GXPCIE.SCHEMATIC1(SCH_1):[e-mail]_060.NORMAL(CHIPS)':
 '61':;