s2gx_pcie_top.tcl

基于SIIGX的PCIe的Kit

# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.

# Quartus II: Generate Tcl File for Project
# File: s2gx_pcie_top.tcl
# Generated on: Mon Jul 24 11:23:22 2006

# Load Quartus II Tcl Project package
package require ::quartus::project

set need_to_close_project 0
set make_assignments 1

# Check that the right project is open
if {[is_project_open]} {
	if {[string compare $quartus(project) "s2gx_pcie_top"]} {
		puts "Project s2gx_pcie_top is not open"
		set make_assignments 0
	}
} else {
	# Only open if not already open
	if {[project_exists s2gx_pcie_top]} {
		project_open -revision s2gx_pcie_top s2gx_pcie_top
	} else {
		project_new -revision s2gx_pcie_top s2gx_pcie_top
	}
	set need_to_close_project 1
}

# Make assignments
if {$make_assignments} {
	set_global_assignment -name FAMILY "Stratix II GX"
	set_global_assignment -name DEVICE EP2SGX90FF1508C3
	set_global_assignment -name ORIGINAL_QUARTUS_VERSION "5.1 SP0.10"
	set_global_assignment -name PROJECT_CREATION_TIME_DATE "14:44:29  DECEMBER 13, 2005"
	set_global_assignment -name LAST_QUARTUS_VERSION 6.0
	set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
	set_global_assignment -name DEVICE_FILTER_PIN_COUNT 1508
	set_global_assignment -name DEVICE_FILTER_SPEED_GRADE FASTEST
	set_global_assignment -name STRATIXII_CONFIGURATION_SCHEME "FAST PASSIVE PARALLEL"
	set_global_assignment -name STRATIXII_CONFIGURATION_DEVICE EPC16
	set_global_assignment -name AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE OFF
	set_global_assignment -name DISABLE_NCS_AND_OE_PULLUPS_ON_CONFIG_DEVICE ON
	set_global_assignment -name COMPRESSION_MODE ON
	set_global_assignment -name EPROM_USE_CHECKSUM_AS_USERCODE ON
	set_global_assignment -name USE_CHECKSUM_AS_USERCODE ON
	set_global_assignment -name GENERATE_TTF_FILE ON
	set_global_assignment -name GENERATE_CONFIG_JBC_FILE_COMPRESSED OFF
	set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
	set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
	set_global_assignment -name CONFIGURATION_CLOCK_FREQUENCY "66 MHZ"
	set_global_assignment -name CONFIGURATION_CLOCK_DIVISOR 1.0
	set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
	set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
	set_global_assignment -name OVERRIDE_DEFAULT_ELECTROMIGRATION_PARAMETERS ON
	set_global_assignment -name MAX_CONSECUTIVE_OUTPUTS_FOR_ELECTROMIGRATION 15
	set_global_assignment -name MAX_CURRENT_FOR_ELECTROMIGRATION 250
	set_global_assignment -name MAX_CONSECUTIVE_VIO_OUTPUTS_FOR_ELECTROMIGRATION 15
	set_global_assignment -name MAX_CURRENT_FOR_VIO_ELECTROMIGRATION 250
	set_global_assignment -name VERILOG_FILE s2gx_pcie_top.v
	set_location_assignment PIN_F20 -to qdrii_k_p
	set_location_assignment PIN_G20 -to qdrii_k_n
	set_location_assignment PIN_C15 -to qdrii_cq_p
	set_location_assignment PIN_B15 -to qdrii_cq_n
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_d
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_bwsn
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_k_p
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_k_n
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_cq_p
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_cq_n
	set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmb_d
	set_location_assignment PIN_V37 -to hsma_clk_in0
	set_location_assignment PIN_G22 -to hsma_clk_out0
	set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmb_clk_in0
	set_instance_assignment -name IO_STANDARD "2.5 V" -to hsmb_clk_out0
	set_instance_assignment -name IO_STANDARD LVDS -to hsmb_clk_in_p1
	set_instance_assignment -name IO_STANDARD LVDS -to hsmb_clk_in_p2
	set_instance_assignment -name IO_STANDARD "2.5 V" -to hsma_clk_in0
	set_instance_assignment -name IO_STANDARD "2.5 V" -to hsma_clk_out0
	set_location_assignment PIN_F38 -to hsma_sda
	set_location_assignment PIN_H36 -to hsma_scl
	set_location_assignment PIN_W37 -to hsmb_clk_in0
	set_location_assignment PIN_AN22 -to hsmb_clk_out0
	set_location_assignment PIN_AD34 -to hsmb_sda
	set_location_assignment PIN_AG30 -to hsmb_scl
	set_location_assignment PIN_AM22 -to user_reset
	set_instance_assignment -name IO_STANDARD "1.8 V" -to user_led
	set_instance_assignment -name IO_STANDARD "1.8 V" -to user_reset
	set_location_assignment PIN_D10 -to qdrii_a[0]
	set_location_assignment PIN_D9 -to qdrii_a[1]
	set_location_assignment PIN_N20 -to qdrii_a[2]
	set_location_assignment PIN_F18 -to qdrii_a[3]
	set_location_assignment PIN_N19 -to qdrii_a[4]
	set_location_assignment PIN_H21 -to qdrii_a[5]
	set_location_assignment PIN_D16 -to qdrii_a[6]
	set_location_assignment PIN_H15 -to qdrii_a[7]
	set_location_assignment PIN_D13 -to qdrii_a[8]
	set_location_assignment PIN_P15 -to qdrii_a[9]
	set_location_assignment PIN_F16 -to qdrii_a[10]
	set_location_assignment PIN_J15 -to qdrii_a[11]
	set_location_assignment PIN_M14 -to qdrii_a[12]
	set_location_assignment PIN_P16 -to qdrii_a[13]
	set_location_assignment PIN_J16 -to qdrii_a[14]
	set_location_assignment PIN_C11 -to qdrii_a[15]
	set_location_assignment PIN_G10 -to qdrii_a[16]
	set_location_assignment PIN_C19 -to qdrii_a[17]
	set_location_assignment PIN_N21 -to qdrii_a[18]
	set_instance_assignment -name IO_STANDARD "2.5 V" -to hsma_d
	set_instance_assignment -name IO_STANDARD "1.8 V" -to hsma_led_rx
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[0]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[1]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[2]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[3]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[4]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[5]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[6]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[7]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[8]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[9]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[10]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[11]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[12]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[13]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[14]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[15]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[16]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[17]
	set_instance_assignment -name IO_STANDARD "1.8-V HSTL CLASS I" -to qdrii_a[18]
	set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dq
	set_instance_assignment -name IO_STANDARD LVDS -to hsma_clk_out_p1
	set_instance_assignment -name IO_STANDARD LVDS -to hsma_clk_out_p2
	set_instance_assignment -name IO_STANDARD LVDS -to hsmb_clk_out_p1
	set_instance_assignment -name IO_STANDARD LVDS -to hsmb_clk_out_p2
	set_location_assignment PIN_P8 -to sfp_refclk_cn
	set_location_assignment PIN_P7 -to sfp_refclk_cp
	set_instance_assignment -name IO_STANDARD "1.8 V" -to sfpa_led_tx
	set_instance_assignment -name IO_STANDARD "1.8 V" -to sfpa_led_rx
	set_instance_assignment -name IO_STANDARD "1.8 V" -to sfpb_led_tx
	set_instance_assignment -name IO_STANDARD "1.8 V" -to sfpb_led_rx
	set_location_assignment PIN_A20 -to clk1_p
	set_instance_assignment -name IO_STANDARD LVDS -to clk1_p
	set_location_assignment PIN_AW22 -to clk2_p
	set_instance_assignment -name IO_STANDARD LVDS -to clk2_p
	set_location_assignment PIN_AT9 -to ddr2_dqs[0]
	set_location_assignment PIN_AU12 -to ddr2_dqs[1]
	set_location_assignment PIN_AT14 -to ddr2_dqs[2]
	set_location_assignment PIN_AP15 -to ddr2_dqs[3]
	set_location_assignment PIN_AV18 -to ddr2_dqs[4]
	set_location_assignment PIN_AU23 -to ddr2_dqs[5]
	set_location_assignment PIN_AT25 -to ddr2_dqs[6]
	set_location_assignment PIN_AU28 -to ddr2_dqs[7]
	set_location_assignment PIN_AW33 -to ddr2_dqs[8]
	set_instance_assignment -name OUTPUT_ENABLE_GROUP 1 -to ddr2_dqs
	set_location_assignment PIN_AU9 -to ddr2_dq[0]
	set_location_assignment PIN_AN10 -to ddr2_dq[1]
	set_location_assignment PIN_AP10 -to ddr2_dq[2]
	set_location_assignment PIN_AW9 -to ddr2_dq[3]
	set_location_assignment PIN_AV10 -to ddr2_dq[4]
	set_location_assignment PIN_AU10 -to ddr2_dq[5]
	set_location_assignment PIN_AN11 -to ddr2_dq[6]
	set_location_assignment PIN_AW10 -to ddr2_dq[7]
	set_location_assignment PIN_AT12 -to ddr2_dq[8]
	set_location_assignment PIN_AW11 -to ddr2_dq[9]
	set_location_assignment PIN_AR12 -to ddr2_dq[10]
	set_location_assignment PIN_AW12 -to ddr2_dq[11]
	set_location_assignment PIN_AN13 -to ddr2_dq[12]
	set_location_assignment PIN_AT13 -to ddr2_dq[13]
	set_location_assignment PIN_AN12 -to ddr2_dq[14]
	set_location_assignment PIN_AU13 -to ddr2_dq[15]
	set_location_assignment PIN_AW13 -to ddr2_dq[16]
	set_location_assignment PIN_AN14 -to ddr2_dq[17]
	set_location_assignment PIN_AV13 -to ddr2_dq[18]
	set_location_assignment PIN_AP14 -to ddr2_dq[19]
	set_location_assignment PIN_AT15 -to ddr2_dq[20]
	set_location_assignment PIN_AR15 -to ddr2_dq[21]
	set_location_assignment PIN_AW14 -to ddr2_dq[22]
	set_location_assignment PIN_AW15 -to ddr2_dq[23]
	set_location_assignment PIN_AN16 -to ddr2_dq[24]
	set_location_assignment PIN_AN15 -to ddr2_dq[25]
	set_location_assignment PIN_AU16 -to ddr2_dq[26]
	set_location_assignment PIN_AT16 -to ddr2_dq[27]
	set_location_assignment PIN_AN17 -to ddr2_dq[28]
	set_location_assignment PIN_AW16 -to ddr2_dq[29]
	set_location_assignment PIN_AV16 -to ddr2_dq[30]
	set_location_assignment PIN_AP17 -to ddr2_dq[31]
	set_location_assignment PIN_AW18 -to ddr2_dq[32]
	set_location_assignment PIN_AT18 -to ddr2_dq[33]
	set_location_assignment PIN_AW17 -to ddr2_dq[34]
	set_location_assignment PIN_AR18 -to ddr2_dq[35]
	set_location_assignment PIN_AN18 -to ddr2_dq[36]
	set_location_assignment PIN_AT19 -to ddr2_dq[37]
	set_location_assignment PIN_AU19 -to ddr2_dq[38]
	set_location_assignment PIN_AN19 -to ddr2_dq[39]
	set_location_assignment PIN_AP23 -to ddr2_dq[40]
	set_location_assignment PIN_AW23 -to ddr2_dq[41]
	set_location_assignment PIN_AW24 -to ddr2_dq[42]
	set_location_assignment PIN_AV24 -to ddr2_dq[43]
	set_location_assignment PIN_AT24 -to ddr2_dq[44]
	set_location_assignment PIN_AP24 -to ddr2_dq[45]
	set_location_assignment PIN_AW25 -to ddr2_dq[46]
	set_location_assignment PIN_AV25 -to ddr2_dq[47]
	set_location_assignment PIN_AP25 -to ddr2_dq[48]
	set_location_assignment PIN_AR25 -to ddr2_dq[49]
	set_location_assignment PIN_AU26 -to ddr2_dq[50]
	set_location_assignment PIN_AW26 -to ddr2_dq[51]
	set_location_assignment PIN_AU27 -to ddr2_dq[52]
	set_location_assignment PIN_AW27 -to ddr2_dq[53]
	set_location_assignment PIN_AW28 -to ddr2_dq[54]
	set_location_assignment PIN_AT27 -to ddr2_dq[55]
	set_location_assignment PIN_AT28 -to ddr2_dq[56]
	set_location_assignment PIN_AW29 -to ddr2_dq[57]
	set_location_assignment PIN_AR28 -to ddr2_dq[58]
	set_location_assignment PIN_AT29 -to ddr2_dq[59]
	set_location_assignment PIN_AU30 -to ddr2_dq[60]
	set_location_assignment PIN_AW30 -to ddr2_dq[61]