hsmc_spi42rx.v

基于SIIGX的PCIe的Kit

// megafunction wizard: %ALTLVDS%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altlvds_rx 

// ============================================================
// File Name: hsmc_spi42rx.v
// Megafunction Name(s):
// 			altlvds_rx
// ============================================================
// ************************************************************
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
//
// 5.1 Build 176 10/26/2005 SP 0.10 SJ Full Version
// ************************************************************


//Copyright (C) 1991-2005 Altera Corporation
//Your use of Altera Corporation's design tools, logic functions 
//and other software and tools, and its AMPP partner logic 
//functions, and any output files any of the foregoing 
//(including device programming or simulation files), and any 
//associated documentation or information are expressly subject 
//to the terms and conditions of the Altera Program License 
//Subscription Agreement, Altera MegaCore Function License 
//Agreement, or other applicable license agreement, including, 
//without limitation, that your use is for the sole purpose of 
//programming logic devices manufactured by Altera and sold by 
//Altera or its authorized distributors.  Please refer to the 
//applicable agreement for further details.


// synopsys translate_off
`timescale 1 ps / 1 ps
// synopsys translate_on
module hsmc_spi42rx (
	rx_in,
	rx_inclock,
	rx_out,
	rx_outclock);

	input	[16:0]  rx_in;
	input	  rx_inclock;
	output	[135:0]  rx_out;
	output	  rx_outclock;

	wire [135:0] sub_wire0;
	wire  sub_wire1;
	wire [135:0] rx_out = sub_wire0[135:0];
	wire  rx_outclock = sub_wire1;

	altlvds_rx	altlvds_rx_component (
				.rx_inclock (rx_inclock),
				.rx_in (rx_in),
				.rx_out (sub_wire0),
				.rx_outclock (sub_wire1)
				// synopsys translate_off
				,
				.rx_dpll_reset (),
				.rx_dpll_enable (),
				.pll_areset (),
				.rx_coreclk (),
				.rx_reset (),
				.rx_locked (),
				.rx_enable (),
				.rx_dpll_hold (),
				.rx_deskew (),
				.rx_fifo_reset (),
				.rx_channel_data_align (),
				.rx_pll_enable (),
				.rx_dpa_locked (),
				.rx_data_align (),
				.rx_cda_reset (),
				.rx_cda_max ()
				// synopsys translate_on
				);
	defparam
		altlvds_rx_component.common_rx_tx_pll = "OFF",
		altlvds_rx_component.deserialization_factor = 8,
		altlvds_rx_component.enable_dpa_mode = "OFF",
		altlvds_rx_component.implement_in_les = "OFF",
		altlvds_rx_component.inclock_data_alignment = "EDGE_ALIGNED",
		altlvds_rx_component.inclock_period = 10000,
		altlvds_rx_component.input_data_rate = 800,
		altlvds_rx_component.intended_device_family = "Stratix II GX",
		altlvds_rx_component.lpm_type = "altlvds_rx",
		altlvds_rx_component.number_of_channels = 17,
		altlvds_rx_component.outclock_resource = "AUTO",
		altlvds_rx_component.registered_output = "ON",
		altlvds_rx_component.use_external_pll = "OFF";


endmodule

// ============================================================
// CNX file retrieval info
// ============================================================
// Retrieval info: PRIVATE: Bitslip NUMERIC "8"
// Retrieval info: PRIVATE: Channel_Data_Align_Max NUMERIC "0"
// Retrieval info: PRIVATE: Channel_Data_Align_Reset NUMERIC "0"
// Retrieval info: PRIVATE: Clock_Mode NUMERIC "0"
// Retrieval info: PRIVATE: Data_rate STRING "800"
// Retrieval info: PRIVATE: Deser_Factor NUMERIC "8"
// Retrieval info: PRIVATE: Enable_DPA_Mode STRING "OFF"
// Retrieval info: PRIVATE: Ext_PLL STRING "OFF"
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Stratix II GX"
// Retrieval info: PRIVATE: Input_Clock_alignment STRING "EDGE_ALIGNED"
// Retrieval info: PRIVATE: Int_Device STRING "Stratix II GX"
// Retrieval info: PRIVATE: LVDS_Mode NUMERIC "1"
// Retrieval info: PRIVATE: Le_Serdes STRING "OFF"
// Retrieval info: PRIVATE: Num_Channel NUMERIC "17"
// Retrieval info: PRIVATE: PLL_Enable NUMERIC "0"
// Retrieval info: PRIVATE: PLL_Freq STRING "100.00"
// Retrieval info: PRIVATE: PLL_Period STRING "10.000"
// Retrieval info: PRIVATE: Reg_InOut NUMERIC "1"
// Retrieval info: PRIVATE: Use_Clock_Resc STRING "AUTO"
// Retrieval info: PRIVATE: Use_Common_Rx_Tx_Plls NUMERIC "0"
// Retrieval info: PRIVATE: Use_Data_Align NUMERIC "0"
// Retrieval info: PRIVATE: Use_Lock NUMERIC "0"
// Retrieval info: PRIVATE: Use_Pll_Areset NUMERIC "0"
// Retrieval info: CONSTANT: COMMON_RX_TX_PLL STRING "OFF"
// Retrieval info: CONSTANT: DESERIALIZATION_FACTOR NUMERIC "8"
// Retrieval info: CONSTANT: ENABLE_DPA_MODE STRING "OFF"
// Retrieval info: CONSTANT: IMPLEMENT_IN_LES STRING "OFF"
// Retrieval info: CONSTANT: INCLOCK_DATA_ALIGNMENT STRING "EDGE_ALIGNED"
// Retrieval info: CONSTANT: INCLOCK_PERIOD NUMERIC "10000"
// Retrieval info: CONSTANT: INPUT_DATA_RATE NUMERIC "800"
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Stratix II GX"
// Retrieval info: CONSTANT: LPM_TYPE STRING "altlvds_rx"
// Retrieval info: CONSTANT: NUMBER_OF_CHANNELS NUMERIC "17"
// Retrieval info: CONSTANT: OUTCLOCK_RESOURCE STRING "AUTO"
// Retrieval info: CONSTANT: REGISTERED_OUTPUT STRING "ON"
// Retrieval info: CONSTANT: USE_EXTERNAL_PLL STRING "OFF"
// Retrieval info: USED_PORT: rx_in 0 0 17 0 INPUT NODEFVAL rx_in[16..0]
// Retrieval info: USED_PORT: rx_inclock 0 0 0 0 INPUT GND rx_inclock
// Retrieval info: USED_PORT: rx_out 0 0 136 0 OUTPUT NODEFVAL rx_out[135..0]
// Retrieval info: USED_PORT: rx_outclock 0 0 0 0 OUTPUT NODEFVAL rx_outclock
// Retrieval info: CONNECT: @rx_in 0 0 17 0 rx_in 0 0 17 0
// Retrieval info: CONNECT: rx_out 0 0 136 0 @rx_out 0 0 136 0
// Retrieval info: CONNECT: @rx_inclock 0 0 0 0 rx_inclock 0 0 0 0
// Retrieval info: CONNECT: rx_outclock 0 0 0 0 @rx_outclock 0 0 0 0
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
// Retrieval info: GEN_FILE: TYPE_NORMAL hsmc_spi42rx.v TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL hsmc_spi42rx.inc FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL hsmc_spi42rx.cmp FALSE
// Retrieval info: GEN_FILE: TYPE_NORMAL hsmc_spi42rx.bsf TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL hsmc_spi42rx_inst.v TRUE
// Retrieval info: GEN_FILE: TYPE_NORMAL hsmc_spi42rx_bb.v TRUE